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In EEPROM, one such Floating gate MOS device FLOTOX is used. FLOTOX(Floating Gate Tunneling Oxide MOS) works on FN tunneling phenomenon. This presentation discusses the method for fabrication of such FLOTOX device(actually a EEPROM cell). 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tabindex="0">0 likes</span><span class="Stats_bullet__DbT30"></span><span class="Text_root__is73U Text_weight-strong__yEO2S Text_secondary__EPWj0 Text_medium__rk8Tn Likes_root__WVQ1_ text" style="-webkit-line-clamp:0" tabindex="0">2,903 views</span></div><div class="author Author_root___6Bx5"><a data-cy="author-link" class="Author_link___lVxw ellipsis" title="Sudhanshu Janwadkar" href="https://www.slideshare.net/shudhanshu29"><div class="Avatar_root__GNWHY" style="width:24px;height:24px;line-height:24px"><img class="Avatar_image__Bbtll" src="https://cdn.slidesharecdn.com/profile-photo-shudhanshu29-48x48.jpg?cb=1736068133" alt="Sudhanshu Janwadkar" loading="lazy" decoding="sync"/></div><span>Sudhanshu Janwadkar</span></a></div><div class="description Description_root__kt4uq Description_clamped__PaV_1"><div class="Description_wrapper__hYE9_" data-cy="document-description"><p>Floating Gate Devices are widely used in ROM based memories. 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class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="eager" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-1-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-1-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-1-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-1-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide2" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-1" alt="Cross-Section View " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-2-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-2-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-2-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-2-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide3" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-2" alt="• The fabrication begins with the formation of an oxide layer on a silicon substrate • It is followed by the patterning of a photoresist mask • Ion implantation is carried out to form the buried n+ regions of the EEPROM memory cell. 1 PR = Photoresist " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-3-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-3-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-3-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-3-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide4" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-3" alt="• After the formation of the buried n+ regions, a tunnel window opening is etched in the oxide layer (utilizing a second photoresist mask). 2 Tunnelling Window " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-4-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-4-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-4-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-4-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide5" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-4" alt="• A thin layer of tunnel oxide , approximately 80 Å thick, is then grown in the tunnel window 3 " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-5-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-5-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-5-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-5-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide6" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-5" alt="• Following the growth of the tunnel oxide, a first layer of polysilicon is deposited and doped to a desired conductivity. 4 Floating Gate (Poly) " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-6-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-6-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-6-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-6-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide7" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-6" alt="• This is followed by formation of an oxide/nitride/oxide (ONO) layer over the first polysilicon layer. 5 " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-7-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-7-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-7-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-7-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide8" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-7" alt="• The ONO and underlying first polysilicon layer are then masked and etched to define the polysilicon floating gate of the memory cell with an overlying ONO layer. • Reoxidation and etchback results in the formation of oxide sidewall spacers on the edges of the floating gate and ONO. 6 " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-8-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-8-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-8-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-8-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide9" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-8" alt="• A second layer of polysilicon is then deposited and doped to a desired concentration and then etched to define a control gate of the memory cell and the gate of the access transistor of the FLOTOX cell 7 " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-9-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-9-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-9-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-9-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide10" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-9" alt="• An N+ source/drain implant is then performed to the source/drain regions of the access transistor 8 " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-10-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-10-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-10-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-10-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide11" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-10" alt="• Finally, a layer of dielectric material is formed and planarized and then etched to form a contact opening to the N+ drain/bit line. This is followed by formation of a metal bit line structure, resulting in the FLOTOX cell shown 9 DIELECTRIC " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-11-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-11-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-11-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-11-320.jpg" sizes="100vw"/></div></div></div><div><div id="slide12" class="VerticalSlide_root__jU_9r slide-item" style="aspect-ratio:720 / 540" data-cy="slide-container"><div class="VerticalSlideImage_root__64KSA"><img id="slide-image-11" alt="References • Patent US 5856222 A " class="vertical-slide-image VerticalSlideImage_image__VtE4p" data-testid="vertical-slide-image" loading="lazy" srcSet="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-12-320.jpg 320w, https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-12-638.jpg 638w, https://image.slidesharecdn.com/flotoox-171024182452/75/Fabrication-of-Floating-Gate-MOS-FLOTOX-12-2048.jpg 2048w" src="https://image.slidesharecdn.com/flotoox-171024182452/85/Fabrication-of-Floating-Gate-MOS-FLOTOX-12-320.jpg" sizes="100vw"/></div></div></div></div></div><div id="sidebar" class="sidebar hide-scrollbar Sidebar_root__1BbNu" style="--slots:4"><div class="above-recs-ad-wrapper AboveRecsAd_root__iTmTR"><div class="AboveRecsAd_desktopAd__ymykj"><div class="freestar-ad-container FreestarAdContainer_root__qPPC_" style="--fallback-aspect-ratio:300 / 260" data-testid="freestar-ad-container"><div><div class="" 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style="anchor-name:--popover-R5mgql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mgql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mgql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/TrijitMallick">Trijit Mallick</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">this ppt provides fabrication on SI wafer, CMOS fabrication process, basic CMOS inverter, future, application, advantage, disadvantage etc.</span></div></div><div class="" id=":Rgql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rgql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-1" aria-haspopup="dialog" aria-controls=":Rhal4f6:" popovertarget=":Rhal4f6:" style="anchor-name:--popover-Rhal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/double-patterning-for-32nm-and-beyond/30955526"><span class="sr-only">Double patterning for 32nm and beyond</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:1" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" 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aria-haspopup="dialog" aria-controls=":R5mhal4f6:" popovertarget=":R5mhal4f6:" style="anchor-name:--popover-R5mhal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mhal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mhal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/ManikandanSampathkum">Manikandan Sampathkumar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Multiple patterning is a class of technologies for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. The simplest case of multiple patterning is double patterning, where a conventional lithography process is enhanced to produce double the expected number of features. The resolution of a photoresist pattern is believed to blur at around 45 nm half-pitch. For the semiconductor industry, therefore, double patterning was introduced for the 32 nm half-pitch node and below. This presentation gives us an insight of why multiple patterning is an important to give us a better resolution below 32nm. </span></div></div><div class="" id=":Rhal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rhal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-2" aria-haspopup="dialog" aria-controls=":Rhql4f6:" popovertarget=":Rhql4f6:" style="anchor-name:--popover-Rhql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/lecture3-ic-fabrication-process/238385304"><span class="sr-only">Lecture3 IC fabrication process</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:2" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Lecture3 IC fabrication process" src="https://cdn.slidesharecdn.com/ss_thumbnails/lecture3-icfabricationprocess-200903164139-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Lecture3 IC fabrication process" src="https://cdn.slidesharecdn.com/ss_thumbnails/lecture3-icfabricationprocess-200903164139-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Lecture3 IC fabrication process</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Lecture3 IC fabrication process for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mhql4f6:" popovertarget=":R5mhql4f6:" style="anchor-name:--popover-R5mhql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mhql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mhql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/sritulasiadigopula">sritulasiadigopula</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The IC fabrication process involves numerous steps: 1) Silicon wafers are manufactured through processes like Czochralski crystal growth and then undergo oxidation, photolithography, etching, diffusion/ion implantation, and metallization. 2) Oxidation grows insulating silicon dioxide layers on the wafer through wet or dry processes. 3) Photolithography uses a mask and light to transfer circuit patterns to photoresist before etching removes exposed material.</span></div></div><div class="" id=":Rhql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rhql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-3" aria-haspopup="dialog" aria-controls=":Rial4f6:" popovertarget=":Rial4f6:" style="anchor-name:--popover-Rial4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication/67049411"><span class="sr-only">Cmos fabrication</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:3" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Cmos fabrication" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-161012081302-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Cmos fabrication" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-161012081302-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Cmos fabrication</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Cmos fabrication for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mial4f6:" popovertarget=":R5mial4f6:" style="anchor-name:--popover-R5mial4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mial4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mial4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/jigyashamaru">jigyashamaru</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document provides an overview of the CMOS fabrication process. It begins by defining CMOS technology and its use of complementary nMOS and pMOS transistors. It then outlines the major steps in the CMOS fabrication process, including lithography to pattern transistors and wires on the silicon wafer. Key steps include oxidation, photolithography, etching, doping via diffusion or implantation, and metallization. The document notes current problems with optical lithography limitations and materials issues. It concludes by discussing potential future changes like new materials, SOI, finFETs, and other design modifications.</span></div></div><div class="" id=":Rial4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rial4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-4" aria-haspopup="dialog" aria-controls=":Riql4f6:" popovertarget=":Riql4f6:" style="anchor-name:--popover-Riql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication-process-124580577/124580577"><span class="sr-only">Cmos fabrication process</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:4" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Cmos fabrication process" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabricationprocess-181201151948-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Cmos fabrication process" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabricationprocess-181201151948-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Cmos fabrication process</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Cmos fabrication process for later" role="switch" aria-haspopup="dialog" aria-controls=":R5miql4f6:" popovertarget=":R5miql4f6:" style="anchor-name:--popover-R5miql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5miql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5miql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AnandaMohan4">Ananda Mohan</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The CMOS fabrication process in VLSI. CMOS (complementary metal-oxide-semiconductor) is the term usually used to describe the small amount of memory on a computer motherboard that stores the BIOS settings.</span></div></div><div class="" id=":Riql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Riql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-5" aria-haspopup="dialog" aria-controls=":Rjal4f6:" popovertarget=":Rjal4f6:" style="anchor-name:--popover-Rjal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication-using-pwell-vlsi/249394222"><span class="sr-only">CMOS Fabrication using P-well -VLSI</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:5" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOS Fabrication using P-well -VLSI" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmos-210617081709-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOS Fabrication using P-well -VLSI" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmos-210617081709-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">CMOS Fabrication using P-well -VLSI</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save CMOS Fabrication using P-well -VLSI for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mjal4f6:" popovertarget=":R5mjal4f6:" style="anchor-name:--popover-R5mjal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mjal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mjal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/Nithin34">NITHIN KALLE PALLY</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">CMOS FABRICATION For less power dissipation requirement CMOS technology is used for implementing transistors. If we require a faster circuit then transistors are implemented over IC using BJT . Fabrication of CMOS transistors as IC’s can be done in three different methods. The N-well / P-well technology, where n-type diffusion is done over a p-type substrate or p-type diffusion is done over n-type substrate respectively. P-WELL PROCESS The fabrication steps of p well process are same as that of an n-well process except that instead of n-well a p-well is implanted . The process steps involved in p-well process are shown in Figure below. The process starts with the n type substrate </span></div></div><div class="" id=":Rjal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rjal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-6" aria-haspopup="dialog" aria-controls=":Rjql4f6:" popovertarget=":Rjql4f6:" style="anchor-name:--popover-Rjql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/shudhanshu29/device-isolation-techniques"><span class="sr-only">Device isolation Techniques</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:6" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Device isolation Techniques" src="https://cdn.slidesharecdn.com/ss_thumbnails/deviceisolationss-170917141053-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Device isolation Techniques" src="https://cdn.slidesharecdn.com/ss_thumbnails/deviceisolationss-170917141053-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Device isolation Techniques</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Device isolation Techniques for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mjql4f6:" popovertarget=":R5mjql4f6:" style="anchor-name:--popover-R5mjql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mjql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mjql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses various techniques for electrically isolating devices in integrated circuits. It describes junction isolation, which uses reverse biased PN junctions, but this did not scale well as devices became smaller. Dielectric isolation techniques like LOCOS and STI were developed using deposited or thermally grown oxides. LOCOS had limitations like bird's beak encroachment affecting small device areas. STI involves etching trenches and depositing oxide to fill them, avoiding issues with LOCOS at small scales.</span></div></div><div class="" id=":Rjql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rjql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-7" aria-haspopup="dialog" aria-controls=":Rkal4f6:" popovertarget=":Rkal4f6:" style="anchor-name:--popover-Rkal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication-71314286/71314286"><span class="sr-only">Cmos fabrication</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:7" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Cmos fabrication" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-170124042413-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Cmos fabrication" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-170124042413-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Cmos fabrication</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Cmos fabrication for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mkal4f6:" popovertarget=":R5mkal4f6:" style="anchor-name:--popover-R5mkal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mkal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mkal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/KANAGARAJT4">KANAGARAJ T</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document summarizes the basic steps in CMOS fabrication: (1) dopants are diffused or implanted into a silicon wafer to form n-well and p-substrate regions; (2) a gate oxide and polysilicon layer are deposited and patterned to form transistors; (3) n+ and p+ diffusion regions are implanted or diffused to form sources, drains and contacts; (4) a metallization process deposits aluminum wires to connect the transistors together into circuits. The process involves repeatedly depositing materials and using lithography to pattern layers from the bottom up on the silicon wafer.</span></div></div><div class="" id=":Rkal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rkal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-8" aria-haspopup="dialog" aria-controls=":Rkql4f6:" popovertarget=":Rkql4f6:" style="anchor-name:--popover-Rkql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/bhargavveepuri/cmos-process-flow"><span class="sr-only">Cmos process flow</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:8" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Cmos process flow" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosprocessflow-140115091019-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Cmos process flow" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosprocessflow-140115091019-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Cmos process flow</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Cmos process flow for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mkql4f6:" popovertarget=":R5mkql4f6:" style="anchor-name:--popover-R5mkql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mkql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mkql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/bhargavveepuri">Bhargav Veepuri</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document describes the key process steps in a standard CMOS fabrication process flow. It begins with an overview of basic CMOS circuits and substrate preparation. Then each major step is outlined, including well formation through ion implantation, gate oxide growth, polysilicon deposition and patterning, source/drain implantation and annealing. Additional metal layers are deposited and patterned before passivation completes the CMOS structure. The process requires 16 photomasks and over 100 individual process steps to fabricate modern integrated circuits using complementary NMOS and PMOS transistors.</span></div></div><div class="" id=":Rkql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rkql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-9" aria-haspopup="dialog" aria-controls=":Rlal4f6:" popovertarget=":Rlal4f6:" style="anchor-name:--popover-Rlal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/vlsi-1/11350508"><span class="sr-only">Vlsi 1</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:9" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Vlsi 1" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi1-120131074151-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Vlsi 1" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi1-120131074151-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Vlsi 1</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Vlsi 1 for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mlal4f6:" popovertarget=":R5mlal4f6:" style="anchor-name:--popover-R5mlal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mlal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mlal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/idris01111">idris01111</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document summarizes the key steps in the n-well CMOS fabrication process: 1) An n-well region is created in a p-type substrate through impurity implantation to form the pMOS transistor. 2) A thick oxide is grown around the nMOS and pMOS active regions, and a thin gate oxide is grown on the active regions. 3) Polysilicon is deposited and patterned to form gates, and n-type and p-type regions are implanted to form sources, drains and channels. 4) Interconnect layers are added through metallization to complete the fabrication process.</span></div></div><div class="" id=":Rlal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rlal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-10" aria-haspopup="dialog" aria-controls=":Rlql4f6:" popovertarget=":Rlql4f6:" style="anchor-name:--popover-Rlql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/double-patterning-3621214/3621214"><span class="sr-only">Double Patterning (4/2 update)</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:10" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Double Patterning (4/2 update)" src="https://cdn.slidesharecdn.com/ss_thumbnails/3621214-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Double Patterning (4/2 update)" src="https://cdn.slidesharecdn.com/ss_thumbnails/3621214-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Double Patterning (4/2 update)</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Double Patterning (4/2 update) for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mlql4f6:" popovertarget=":R5mlql4f6:" style="anchor-name:--popover-R5mlql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mlql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mlql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/luk036">Danny Luk</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses double patterning lithography techniques. It introduces how optical lithography is approaching its limits and double patterning is needed for smaller feature sizes. It describes the double patterning process and challenges including feature distortion and decreased yield. The document outlines techniques for polygon cutting, priority search trees, and decomposing conflict graphs into tri-connected components to solve the layout splitting problem. Experimental results on test cases including a 320k polygon design show the method achieves 3-10x speedup.</span></div></div><div class="" id=":Rlql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rlql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-11" aria-haspopup="dialog" aria-controls=":Rmal4f6:" popovertarget=":Rmal4f6:" style="anchor-name:--popover-Rmal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/second-order-effects/89683801"><span class="sr-only">Second order effects</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:11" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Second order effects" src="https://cdn.slidesharecdn.com/ss_thumbnails/secondordereffects-180305173314-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Second order effects" src="https://cdn.slidesharecdn.com/ss_thumbnails/secondordereffects-180305173314-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Second order effects</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Second order effects for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mmal4f6:" popovertarget=":R5mmal4f6:" style="anchor-name:--popover-R5mmal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mmal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mmal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/rppvch">PRAVEEN KUMAR CHITLURI</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses four topics related to transistors: 1. Threshold voltage is the minimum gate voltage needed to create a conducting path between source and drain, and depends on oxide thickness, temperature, and random dopant fluctuations. 2. Latchup refers to a short circuit formed between power and ground rails in an integrated circuit, caused by interaction between parasitic bipolar transistors. 3. Electromigration is the forced movement of metal ions due to an electric field, with atoms traveling toward the positive conductor end and vacancies toward the negative end. 4. Mobility degradation occurs due to lateral and vertical electric fields scattering carriers, reducing surface mobility as channel lengths shrink.</span></div></div><div class="" id=":Rmal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rmal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-12" aria-haspopup="dialog" aria-controls=":Rmql4f6:" popovertarget=":Rmql4f6:" style="anchor-name:--popover-Rmql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/ic-technology-diffusion-and-ion-implantation/69938488"><span class="sr-only">Ic technology- diffusion and ion implantation</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:12" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Ic technology- diffusion and ion implantation" src="https://cdn.slidesharecdn.com/ss_thumbnails/ictechnologyunit2-161208041707-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Ic technology- diffusion and ion implantation" src="https://cdn.slidesharecdn.com/ss_thumbnails/ictechnologyunit2-161208041707-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Ic technology- diffusion and ion implantation</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Ic technology- diffusion and ion implantation for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mmql4f6:" popovertarget=":R5mmql4f6:" style="anchor-name:--popover-R5mmql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mmql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mmql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/kritickasharma">kriticka sharma</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses various methods of doping semiconductors, including diffusion and ion implantation. It provides details on Fick's laws of diffusion and their solutions, which describe how dopant concentration changes over time during diffusion. The effects of temperature, electric fields, and oxidation on diffusion are also covered. Ion implantation is introduced as an alternative doping technique that allows for precise control of dopant dose and depth but requires annealing. Key advantages and challenges of each method are highlighted.</span></div></div><div class="" id=":Rmql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rmql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-13" aria-haspopup="dialog" aria-controls=":Rnal4f6:" popovertarget=":Rnal4f6:" style="anchor-name:--popover-Rnal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/vlsi-2/11350708"><span class="sr-only">Vlsi 2</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:13" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Vlsi 2" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi2-120131080155-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Vlsi 2" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi2-120131080155-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Vlsi 2</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Vlsi 2 for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mnal4f6:" popovertarget=":R5mnal4f6:" style="anchor-name:--popover-R5mnal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mnal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mnal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/idris01111">idris01111</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document describes the key steps in CMOS fabrication: 1. A p-type substrate is used, and n-well regions are defined through implantation to create isolation for p-MOSFETs. 2. Active device regions and field oxide isolation are then patterned, followed by gate oxide growth and polysilicon deposition. 3. Self-aligned implantation creates n-type and p-type source/drain regions. Additional metallization layers connect the transistors.</span></div></div><div class="" id=":Rnal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rnal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-14" aria-haspopup="dialog" aria-controls=":Rnql4f6:" popovertarget=":Rnql4f6:" style="anchor-name:--popover-Rnql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fabrication-of-ic-231424742/231424742"><span class="sr-only">Fabrication of IC</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:14" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Fabrication of IC" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabricationofic-200404151227-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Fabrication of IC" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabricationofic-200404151227-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Fabrication of IC</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Fabrication of IC for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mnql4f6:" popovertarget=":R5mnql4f6:" style="anchor-name:--popover-R5mnql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mnql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mnql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/RohanKaushik18">Adani Institute of Infrastructure Engineering College</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document summarizes key steps in the fabrication of integrated circuits: thermal oxidation grows a silicon dioxide layer on the wafer for diffusion barriers and insulation; photolithography patterns the oxide layer using a mask, photoresist, and etching; dopant diffusion introduces impurities into the silicon by heating to allow movement; and metal evaporation deposits a thin aluminum film to connect components. These process steps are precisely controlled to build up the circuit structures layer-by-layer on the silicon wafer.</span></div></div><div class="" id=":Rnql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rnql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-15" aria-haspopup="dialog" aria-controls=":Roal4f6:" popovertarget=":Roal4f6:" style="anchor-name:--popover-Roal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication-and-techniques/249831557"><span class="sr-only">CMOS FABRICATION AND TECHNIQUES</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:15" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOS FABRICATION AND TECHNIQUES" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-210722073537-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOS FABRICATION AND TECHNIQUES" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-210722073537-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">CMOS FABRICATION AND TECHNIQUES</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save CMOS FABRICATION AND TECHNIQUES for later" role="switch" aria-haspopup="dialog" aria-controls=":R5moal4f6:" popovertarget=":R5moal4f6:" style="anchor-name:--popover-R5moal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5moal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5moal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AbhishekSur1">Abhishek Sur</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Cmos fabrication is a part of semiconductor electronics that deals with the designing and fabrication process with NMOS and Cmos and other processes like Twin tub techniques and etc.</span></div></div><div class="" id=":Roal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Roal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-16" aria-haspopup="dialog" aria-controls=":Roql4f6:" popovertarget=":Roql4f6:" style="anchor-name:--popover-Roql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/noise-margin/16883592"><span class="sr-only">Static Noise margin </span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:16" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Static Noise margin " src="https://cdn.slidesharecdn.com/ss_thumbnails/noisemargin-130302113013-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Static Noise margin " src="https://cdn.slidesharecdn.com/ss_thumbnails/noisemargin-130302113013-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Static Noise margin </span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" 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class="seo-only">https://www.udemy.com/vlsi-academy http://vlsisystemdesign.com/noise_margin.php Noise margin is the amount of noise that a CMOS circuit could withstand without compromising the operation of circuit. Noise margin does makes sure that any signal which is logic '1' with finite noise added to it, is still recognised as logic '1' and not logic '0'. It is basically the difference between signal value and the nosie value.</span></div></div><div class="" id=":Roql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Roql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-17" aria-haspopup="dialog" aria-controls=":Rpal4f6:" popovertarget=":Rpal4f6:" style="anchor-name:--popover-Rpal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/analog-design-cit-f/29991014"><span class="sr-only">Analog Layout design </span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:17" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Analog Layout design " src="https://cdn.slidesharecdn.com/ss_thumbnails/analogdesigncitf-140114022933-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Analog Layout design " src="https://cdn.slidesharecdn.com/ss_thumbnails/analogdesigncitf-140114022933-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Analog Layout design </span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Analog Layout design for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mpal4f6:" popovertarget=":R5mpal4f6:" style="anchor-name:--popover-R5mpal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mpal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mpal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/slpinjare">slpinjare</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document provides an overview of analog layout design. It discusses that analog circuits require careful attention to geometry during layout due to process variations. The analog design flow includes electrical design, physical design involving layout, and fabrication/testing. Key considerations for analog layout include minimizing parasitic resistances and capacitances, reducing noise, and ensuring matching between identical components using techniques like common-centroid layout. Resistors and capacitors must be carefully laid out to minimize non-ideal effects and provide accurate values.</span></div></div><div class="" id=":Rpal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rpal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-18" aria-haspopup="dialog" aria-controls=":Rpql4f6:" popovertarget=":Rpql4f6:" style="anchor-name:--popover-Rpql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/depletion-mosfet-and-digital-mosfet-circuits/249444957"><span class="sr-only">Depletion MOSFET and Digital MOSFET Circuits</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:18" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Depletion MOSFET and Digital MOSFET Circuits" src="https://cdn.slidesharecdn.com/ss_thumbnails/mosfetanditsbiasing-210622060857-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Depletion MOSFET and Digital MOSFET Circuits" src="https://cdn.slidesharecdn.com/ss_thumbnails/mosfetanditsbiasing-210622060857-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Depletion MOSFET and Digital MOSFET Circuits</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Depletion MOSFET and Digital MOSFET Circuits for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mpql4f6:" popovertarget=":R5mpql4f6:" style="anchor-name:--popover-R5mpql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mpql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mpql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/VARUNKUMAR391">VARUN KUMAR</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses depletion MOSFET and digital MOSFET circuits. It describes a depletion-type n-channel MOSFET structure on a p-type substrate with two n+ source and drain regions separated by a distance. When a negative gate voltage is applied, it induces positive charges in the semiconductor beneath the oxide, decreasing conductivity and allowing current to flow through the induced channel. Digital MOSFET circuits include the MOS inverter, which acts as a NOT gate, the NAND gate, and the NOR gate. P-channel devices require more area than n-channel devices for the same resistance due to differences in hole and electron mobility.</span></div></div><div class="" id=":Rpql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rpql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-19" aria-haspopup="dialog" aria-controls=":Rqal4f6:" popovertarget=":Rqal4f6:" style="anchor-name:--popover-Rqal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/mos-capacitorabu-syed-kuet/236291008"><span class="sr-only">MOS Capacitor</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:19" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="MOS Capacitor" src="https://cdn.slidesharecdn.com/ss_thumbnails/1543369466ee4209-moscap-200627074545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="MOS Capacitor" src="https://cdn.slidesharecdn.com/ss_thumbnails/1543369466ee4209-moscap-200627074545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">MOS Capacitor</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save MOS Capacitor for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mqal4f6:" popovertarget=":R5mqal4f6:" style="anchor-name:--popover-R5mqal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mqal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mqal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/syedsumon">A. S. M. Jannatul Islam</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">1) The document discusses the Metal-Oxide-Semiconductor (MOS) capacitor, which is important for understanding MOSFET operation. 2) It describes the energy band diagrams and carrier accumulation, depletion, and inversion in MOS capacitors under different bias conditions for both p-type and n-type semiconductor substrates. 3) Key concepts covered include the flat-band voltage, threshold voltage, effects of oxide charges, and maximum depletion width.</span></div></div><div class="" id=":Rqal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rqal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-20" aria-haspopup="dialog" aria-controls=":Rqql4f6:" popovertarget=":Rqql4f6:" style="anchor-name:--popover-Rqql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/WPE/912927"><span class="sr-only">WPE</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:20" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="WPE" src="https://cdn.slidesharecdn.com/ss_thumbnails/WPE-123184826661-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="WPE" src="https://cdn.slidesharecdn.com/ss_thumbnails/WPE-123184826661-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">WPE</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save WPE for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mqql4f6:" popovertarget=":R5mqql4f6:" style="anchor-name:--popover-R5mqql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mqql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mqql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AdrianOShaughnessy">AdrianOShaughnessy</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses the Well Proximity Effect (WPE) where transistors located near the edge of a well will have different thresholds and currents compared to those located remotely from the edge. The WPE effect occurs for all types of MOS transistors including standard, high, low, and thick/thin oxide devices. It provides a diagram from an IC Mask Design course illustrating the WPE effect.</span></div></div><div class="" id=":Rqql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rqql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-21" aria-haspopup="dialog" aria-controls=":Rral4f6:" popovertarget=":Rral4f6:" style="anchor-name:--popover-Rral4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/junctionless-transistors-31680531/31680531"><span class="sr-only">Junctionless transistors</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:21" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Junctionless transistors" src="https://cdn.slidesharecdn.com/ss_thumbnails/jlt-140226124207-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Junctionless transistors" src="https://cdn.slidesharecdn.com/ss_thumbnails/jlt-140226124207-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Junctionless transistors</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Junctionless transistors for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mral4f6:" popovertarget=":R5mral4f6:" style="anchor-name:--popover-R5mral4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mral4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mral4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/pratishthaagnihotri">Pratishtha Agnihotri</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses junctionless transistors as an alternative to traditional transistors. Junctionless transistors have no p-n junctions and instead use uniformly doped semiconductor material. They offer advantages like simpler fabrication without implantation or annealing steps, reduced short channel effects, higher carrier mobility, and lower leakage current. However, they can have greater threshold voltage variability than conventional transistors. The document provides details on the structure and operation of junctionless transistors, comparing them to traditional transistors and discussing their potential to enable further device miniaturization.</span></div></div><div class="" id=":Rral4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rral4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-22" aria-haspopup="dialog" aria-controls=":Rrql4f6:" popovertarget=":Rrql4f6:" style="anchor-name:--popover-Rrql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/latch-up/26735030"><span class="sr-only">Latch up</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:22" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Latch up" src="https://cdn.slidesharecdn.com/ss_thumbnails/latch-up-131001053300-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Latch up" src="https://cdn.slidesharecdn.com/ss_thumbnails/latch-up-131001053300-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Latch up</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Latch up for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mrql4f6:" popovertarget=":R5mrql4f6:" style="anchor-name:--popover-R5mrql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mrql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mrql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/ishan111">ishan111</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Latch-up occurs in CMOS chips due to the interaction of parasitic bipolar transistors that form a silicon-controlled rectifier between the power and ground rails. This can cause excessive currents and potentially damage devices. Latch-up can be triggered by disturbances that increase the collector current of one of the parasitic transistors, activating positive feedback between the transistors. Guidelines for preventing latch-up include using guard rings connected to power and ground around transistors to reduce resistance and capture minority carriers, as well as placing wells and substrate contacts close to transistor sources.</span></div></div><div class="" id=":Rrql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rrql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-23" aria-haspopup="dialog" aria-controls=":Rsal4f6:" popovertarget=":Rsal4f6:" style="anchor-name:--popover-Rsal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/lalitgarg/lect5-diffusion"><span class="sr-only">Lect5 Diffusion</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:23" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Lect5 Diffusion" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect5diffusion-13530589681303-phpapp02-121116035615-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Lect5 Diffusion" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect5diffusion-13530589681303-phpapp02-121116035615-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Lect5 Diffusion</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Lect5 Diffusion for later" role="switch" aria-haspopup="dialog" aria-controls=":R5msal4f6:" popovertarget=":R5msal4f6:" style="anchor-name:--popover-R5msal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5msal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5msal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/lalitgarg">Lalit Garg</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The key processes involved in IC manufacturing on the wafer include diffusion, ion implantation, photolithography, deposition, and etching. Specifically, diffusion and ion implantation are used to introduce impurities into silicon to control conductivity by either thermal diffusion of dopant atoms into silicon or injection of energetic dopant ions. Fick's first and second laws of diffusion describe diffusion quantitatively, where the flux of diffusing particles is proportional to the concentration gradient according to the first law, and the second law relates the change in concentration over time to the divergence of the flux.</span></div></div><div class="" id=":Rsal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rsal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-24" aria-haspopup="dialog" aria-controls=":Rsql4f6:" popovertarget=":Rsql4f6:" style="anchor-name:--popover-Rsql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/pass-transistor-logic/14648783"><span class="sr-only">Pass Transistor Logic</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:24" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Pass Transistor Logic" src="https://cdn.slidesharecdn.com/ss_thumbnails/dp-121009041819-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Pass Transistor Logic" src="https://cdn.slidesharecdn.com/ss_thumbnails/dp-121009041819-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Pass Transistor Logic</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Pass Transistor Logic for later" role="switch" aria-haspopup="dialog" aria-controls=":R5msql4f6:" popovertarget=":R5msql4f6:" style="anchor-name:--popover-R5msql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5msql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5msql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/diwakerpant">Diwaker Pant</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document compares the use of complementary pass-transistor logic (CPL) to conventional CMOS design. CPL uses fewer transistors than CMOS gates, has smaller capacitances, and is faster. A 2:1 multiplexer is designed using both CMOS and CPL in Microwind and DSCH2 layout tools. Simulation results show the CPL multiplexer has lower power consumption, smaller area, faster rise/fall delays compared to the CMOS multiplexer. Therefore, CPL offers advantages over conventional CMOS in terms of speed, area, and power-delay products.</span></div></div><div class="" id=":Rsql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rsql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-25" aria-haspopup="dialog" aria-controls=":Rtal4f6:" popovertarget=":Rtal4f6:" style="anchor-name:--popover-Rtal4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/wafer-preparation/123523068"><span class="sr-only">Wafer preparation</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:25" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Wafer preparation" src="https://cdn.slidesharecdn.com/ss_thumbnails/waferpreparation-181120154545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Wafer preparation" src="https://cdn.slidesharecdn.com/ss_thumbnails/waferpreparation-181120154545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Wafer preparation</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Wafer preparation for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mtal4f6:" popovertarget=":R5mtal4f6:" style="anchor-name:--popover-R5mtal4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mtal4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mtal4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/SomitSamanto1">SomitSamanto1</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses the preparation process for silicon wafers used in integrated circuit manufacturing. It describes how a silicon crystal is grown and cut into wafers, which then undergo cleaning, etching, planarization, polishing, and inspection steps to produce a smooth, flat surface suitable for microfabrication. Key properties of wafers that are controlled include diameter, thickness, bow, thickness variation, and surface orientation. The presentation concludes that wafers serve as substrates for building microelectronic devices and undergo many process steps before individual circuits are separated and packaged.</span></div></div><div class="" id=":Rtal4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rtal4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-26" aria-haspopup="dialog" aria-controls=":Rtql4f6:" popovertarget=":Rtql4f6:" style="anchor-name:--popover-Rtql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/AdrianOShaughnessy/nmi-presentation-sept-2007"><span class="sr-only">Nmi Presentation Sept 2007</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:26" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Nmi Presentation Sept 2007" src="https://cdn.slidesharecdn.com/ss_thumbnails/nmipresentationsept2007-12870663346649-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Nmi Presentation Sept 2007" src="https://cdn.slidesharecdn.com/ss_thumbnails/nmipresentationsept2007-12870663346649-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Nmi Presentation Sept 2007</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Nmi Presentation Sept 2007 for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mtql4f6:" popovertarget=":R5mtql4f6:" style="anchor-name:--popover-R5mtql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mtql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mtql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AdrianOShaughnessy">AdrianOShaughnessy</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses layout challenges at the 90nm technology node. It covers analog layout challenges including shallow trench isolation (STI) stress and well proximity effects that can degrade transistor performance. For RF layout, it discusses the importance of minimizing interconnect and device parasitics. Interconnect parasitics like resistance and capacitance can be reduced by shorter lengths, wider widths, and using higher metal layers. Device parasitics are also discussed and how optimizing the drain area of differential pairs by folding can help minimize parasitic capacitance effects.</span></div></div><div class="" id=":Rtql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rtql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-27" aria-haspopup="dialog" aria-controls=":Rual4f6:" popovertarget=":Rual4f6:" style="anchor-name:--popover-Rual4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/unit-vi-cpldfpga-architecture/80394205"><span class="sr-only">Unit VI CPLD-FPGA Architecture</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:27" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Unit VI CPLD-FPGA Architecture" src="https://cdn.slidesharecdn.com/ss_thumbnails/unitvicpld-fpga-171003081216-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Unit VI CPLD-FPGA Architecture" src="https://cdn.slidesharecdn.com/ss_thumbnails/unitvicpld-fpga-171003081216-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Unit VI CPLD-FPGA Architecture</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Unit VI CPLD-FPGA Architecture for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mual4f6:" popovertarget=":R5mual4f6:" style="anchor-name:--popover-R5mual4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mual4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mual4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/sudhirshelke73">Principal,Guru Nanak Institute of Technology, Nagpur</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses the architectures and applications of CPLDs and FPGAs. It begins by classifying programmable logic devices and describing simple programmable logic devices like PLDs, PALs, and GALs. It then discusses more complex programmable logic devices like CPLDs, describing their architecture which consists of logic blocks, I/O blocks, and a global interconnect. Finally, it covers field programmable gate arrays including their architecture of configurable logic blocks, I/O blocks, and a programmable interconnect, as well as describing Xilinx's logic cell array architecture for FPGAs.</span></div></div><div class="" id=":Rual4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rual4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-28" aria-haspopup="dialog" aria-controls=":Ruql4f6:" popovertarget=":Ruql4f6:" style="anchor-name:--popover-Ruql4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fabrication-process/249824383"><span class="sr-only">FABRICATION PROCESS</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:28" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="FABRICATION PROCESS" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabrication-210721150955-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="FABRICATION PROCESS" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabrication-210721150955-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">FABRICATION PROCESS</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save FABRICATION PROCESS for later" role="switch" aria-haspopup="dialog" aria-controls=":R5muql4f6:" popovertarget=":R5muql4f6:" style="anchor-name:--popover-R5muql4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5muql4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5muql4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/KUNALRANA48">KUNAL RANA</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Process of IC Fabrication with steps. The content presented are taken from various sources and explained using my understanding. </span></div></div><div class="" id=":Ruql4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Ruql4f6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="recommended-card-description-29" aria-haspopup="dialog" aria-controls=":Rval4f6:" popovertarget=":Rval4f6:" style="anchor-name:--popover-Rval4f6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/device-isolation/232194317"><span class="sr-only">Device isolation</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:29" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Device isolation" src="https://cdn.slidesharecdn.com/ss_thumbnails/deviceisolation-200417181128-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Device isolation" src="https://cdn.slidesharecdn.com/ss_thumbnails/deviceisolation-200417181128-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Device isolation</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Device isolation for later" role="switch" aria-haspopup="dialog" aria-controls=":R5mval4f6:" popovertarget=":R5mval4f6:" style="anchor-name:--popover-R5mval4f6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R5mval4f6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R5mval4f6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/nehasharma1355">neha sharma</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses two main techniques for isolating transistors in semiconductor fabrication: LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation). LOCOS uses a thermal oxidation process which results in a "bird's beak" encroachment that wastes surface area. STI improves on LOCOS by etching shallow trenches and filling them with deposited oxide, avoiding the bird's beak effect but requiring more processing steps. Both techniques utilize thermally grown oxides and masks like silicon nitride to selectively grow isolation oxides and define active device areas.</span></div></div><div class="" id=":Rval4f6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rval4f6"></div></div></div></div><div class="RelatedContent_root__29Np1"><div class="RelatedContent_wrapper__riU7l"><h2 class="Heading_heading__3MAvZ Heading_h2__f9yvs RelatedContent_title__QUhpL">More Related Content</h2><div class="bottom-recs BottomRecommendation_root__7aU9w"><h3 class="BottomRecommendation_title__SRj68">What's hot <span class="BottomRecommendation_count__4HpLo">(20)</span></h3><div class="BottomRecommendationContent_root__2qm4_"><div class="mobile-recs"><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-0" aria-haspopup="dialog" aria-controls=":R8b4pkf6:" popovertarget=":R8b4pkf6:" style="anchor-name:--popover-R8b4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/bhargavveepuri/cmos-process-flow"><span class="sr-only">Cmos process flow</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:0" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Cmos process flow" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosprocessflow-140115091019-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Cmos process flow" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosprocessflow-140115091019-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Cmos process flow</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Cmos process flow for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8b4pkf6:" popovertarget=":R2r8b4pkf6:" style="anchor-name:--popover-R2r8b4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8b4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8b4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/bhargavveepuri">Bhargav Veepuri</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document describes the key process steps in a standard CMOS fabrication process flow. It begins with an overview of basic CMOS circuits and substrate preparation. Then each major step is outlined, including well formation through ion implantation, gate oxide growth, polysilicon deposition and patterning, source/drain implantation and annealing. Additional metal layers are deposited and patterned before passivation completes the CMOS structure. The process requires 16 photomasks and over 100 individual process steps to fabricate modern integrated circuits using complementary NMOS and PMOS transistors.</span></div></div><div class="" id=":R8b4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8b4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-1" aria-haspopup="dialog" aria-controls=":R8j4pkf6:" popovertarget=":R8j4pkf6:" style="anchor-name:--popover-R8j4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/vlsi-1/11350508"><span class="sr-only">Vlsi 1</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:1" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Vlsi 1" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi1-120131074151-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Vlsi 1" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi1-120131074151-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Vlsi 1</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Vlsi 1 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8j4pkf6:" popovertarget=":R2r8j4pkf6:" style="anchor-name:--popover-R2r8j4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8j4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8j4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/idris01111">idris01111</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document summarizes the key steps in the n-well CMOS fabrication process: 1) An n-well region is created in a p-type substrate through impurity implantation to form the pMOS transistor. 2) A thick oxide is grown around the nMOS and pMOS active regions, and a thin gate oxide is grown on the active regions. 3) Polysilicon is deposited and patterned to form gates, and n-type and p-type regions are implanted to form sources, drains and channels. 4) Interconnect layers are added through metallization to complete the fabrication process.</span></div></div><div class="" id=":R8j4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8j4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-2" aria-haspopup="dialog" aria-controls=":R8r4pkf6:" popovertarget=":R8r4pkf6:" style="anchor-name:--popover-R8r4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/double-patterning-3621214/3621214"><span class="sr-only">Double Patterning (4/2 update)</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:2" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Double Patterning (4/2 update)" src="https://cdn.slidesharecdn.com/ss_thumbnails/3621214-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Double Patterning (4/2 update)" src="https://cdn.slidesharecdn.com/ss_thumbnails/3621214-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Double Patterning (4/2 update)</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Double Patterning (4/2 update) for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8r4pkf6:" popovertarget=":R2r8r4pkf6:" style="anchor-name:--popover-R2r8r4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8r4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8r4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/luk036">Danny Luk</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses double patterning lithography techniques. It introduces how optical lithography is approaching its limits and double patterning is needed for smaller feature sizes. It describes the double patterning process and challenges including feature distortion and decreased yield. The document outlines techniques for polygon cutting, priority search trees, and decomposing conflict graphs into tri-connected components to solve the layout splitting problem. Experimental results on test cases including a 320k polygon design show the method achieves 3-10x speedup.</span></div></div><div class="" id=":R8r4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8r4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-3" aria-haspopup="dialog" aria-controls=":R934pkf6:" popovertarget=":R934pkf6:" style="anchor-name:--popover-R934pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/second-order-effects/89683801"><span class="sr-only">Second order effects</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:3" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Second order effects" src="https://cdn.slidesharecdn.com/ss_thumbnails/secondordereffects-180305173314-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Second order effects" src="https://cdn.slidesharecdn.com/ss_thumbnails/secondordereffects-180305173314-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Second order effects</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Second order effects for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r934pkf6:" popovertarget=":R2r934pkf6:" style="anchor-name:--popover-R2r934pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r934pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r934pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/rppvch">PRAVEEN KUMAR CHITLURI</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses four topics related to transistors: 1. Threshold voltage is the minimum gate voltage needed to create a conducting path between source and drain, and depends on oxide thickness, temperature, and random dopant fluctuations. 2. Latchup refers to a short circuit formed between power and ground rails in an integrated circuit, caused by interaction between parasitic bipolar transistors. 3. Electromigration is the forced movement of metal ions due to an electric field, with atoms traveling toward the positive conductor end and vacancies toward the negative end. 4. Mobility degradation occurs due to lateral and vertical electric fields scattering carriers, reducing surface mobility as channel lengths shrink.</span></div></div><div class="" id=":R934pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R934pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-4" aria-haspopup="dialog" aria-controls=":R9b4pkf6:" popovertarget=":R9b4pkf6:" style="anchor-name:--popover-R9b4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/ic-technology-diffusion-and-ion-implantation/69938488"><span class="sr-only">Ic technology- diffusion and ion implantation</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:4" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Ic technology- diffusion and ion implantation" src="https://cdn.slidesharecdn.com/ss_thumbnails/ictechnologyunit2-161208041707-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Ic technology- diffusion and ion implantation" src="https://cdn.slidesharecdn.com/ss_thumbnails/ictechnologyunit2-161208041707-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Ic technology- diffusion and ion implantation</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Ic technology- diffusion and ion implantation for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9b4pkf6:" popovertarget=":R2r9b4pkf6:" style="anchor-name:--popover-R2r9b4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9b4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9b4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/kritickasharma">kriticka sharma</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses various methods of doping semiconductors, including diffusion and ion implantation. It provides details on Fick's laws of diffusion and their solutions, which describe how dopant concentration changes over time during diffusion. The effects of temperature, electric fields, and oxidation on diffusion are also covered. Ion implantation is introduced as an alternative doping technique that allows for precise control of dopant dose and depth but requires annealing. Key advantages and challenges of each method are highlighted.</span></div></div><div class="" id=":R9b4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9b4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-5" aria-haspopup="dialog" aria-controls=":R9j4pkf6:" popovertarget=":R9j4pkf6:" style="anchor-name:--popover-R9j4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/vlsi-2/11350708"><span class="sr-only">Vlsi 2</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:5" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Vlsi 2" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi2-120131080155-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Vlsi 2" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi2-120131080155-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Vlsi 2</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Vlsi 2 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9j4pkf6:" popovertarget=":R2r9j4pkf6:" style="anchor-name:--popover-R2r9j4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9j4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9j4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/idris01111">idris01111</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document describes the key steps in CMOS fabrication: 1. A p-type substrate is used, and n-well regions are defined through implantation to create isolation for p-MOSFETs. 2. Active device regions and field oxide isolation are then patterned, followed by gate oxide growth and polysilicon deposition. 3. Self-aligned implantation creates n-type and p-type source/drain regions. Additional metallization layers connect the transistors.</span></div></div><div class="" id=":R9j4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9j4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-6" aria-haspopup="dialog" aria-controls=":R9r4pkf6:" popovertarget=":R9r4pkf6:" style="anchor-name:--popover-R9r4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fabrication-of-ic-231424742/231424742"><span class="sr-only">Fabrication of IC</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:6" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Fabrication of IC" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabricationofic-200404151227-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Fabrication of IC" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabricationofic-200404151227-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Fabrication of IC</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Fabrication of IC for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9r4pkf6:" popovertarget=":R2r9r4pkf6:" style="anchor-name:--popover-R2r9r4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9r4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9r4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/RohanKaushik18">Adani Institute of Infrastructure Engineering College</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document summarizes key steps in the fabrication of integrated circuits: thermal oxidation grows a silicon dioxide layer on the wafer for diffusion barriers and insulation; photolithography patterns the oxide layer using a mask, photoresist, and etching; dopant diffusion introduces impurities into the silicon by heating to allow movement; and metal evaporation deposits a thin aluminum film to connect components. These process steps are precisely controlled to build up the circuit structures layer-by-layer on the silicon wafer.</span></div></div><div class="" id=":R9r4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9r4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-7" aria-haspopup="dialog" aria-controls=":Ra34pkf6:" popovertarget=":Ra34pkf6:" style="anchor-name:--popover-Ra34pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication-and-techniques/249831557"><span class="sr-only">CMOS FABRICATION AND TECHNIQUES</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:7" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOS FABRICATION AND TECHNIQUES" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-210722073537-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOS FABRICATION AND TECHNIQUES" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabrication-210722073537-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">CMOS FABRICATION AND TECHNIQUES</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save CMOS FABRICATION AND TECHNIQUES for later" role="switch" aria-haspopup="dialog" aria-controls=":R2ra34pkf6:" popovertarget=":R2ra34pkf6:" style="anchor-name:--popover-R2ra34pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2ra34pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2ra34pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AbhishekSur1">Abhishek Sur</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Cmos fabrication is a part of semiconductor electronics that deals with the designing and fabrication process with NMOS and Cmos and other processes like Twin tub techniques and etc.</span></div></div><div class="" id=":Ra34pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Ra34pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-8" aria-haspopup="dialog" aria-controls=":Rab4pkf6:" popovertarget=":Rab4pkf6:" style="anchor-name:--popover-Rab4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/noise-margin/16883592"><span class="sr-only">Static Noise margin </span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:8" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Static Noise margin " src="https://cdn.slidesharecdn.com/ss_thumbnails/noisemargin-130302113013-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Static Noise margin " src="https://cdn.slidesharecdn.com/ss_thumbnails/noisemargin-130302113013-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Static Noise margin </span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Static Noise margin for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rab4pkf6:" popovertarget=":R2rab4pkf6:" style="anchor-name:--popover-R2rab4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rab4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rab4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/vlsisyst">VLSI SYSTEM Design</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">https://www.udemy.com/vlsi-academy http://vlsisystemdesign.com/noise_margin.php Noise margin is the amount of noise that a CMOS circuit could withstand without compromising the operation of circuit. Noise margin does makes sure that any signal which is logic '1' with finite noise added to it, is still recognised as logic '1' and not logic '0'. It is basically the difference between signal value and the nosie value.</span></div></div><div class="" id=":Rab4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rab4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-9" aria-haspopup="dialog" aria-controls=":Raj4pkf6:" popovertarget=":Raj4pkf6:" style="anchor-name:--popover-Raj4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/analog-design-cit-f/29991014"><span class="sr-only">Analog Layout design </span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:9" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Analog Layout design " src="https://cdn.slidesharecdn.com/ss_thumbnails/analogdesigncitf-140114022933-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Analog Layout design " src="https://cdn.slidesharecdn.com/ss_thumbnails/analogdesigncitf-140114022933-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Analog Layout design </span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Analog Layout design for later" role="switch" aria-haspopup="dialog" aria-controls=":R2raj4pkf6:" popovertarget=":R2raj4pkf6:" style="anchor-name:--popover-R2raj4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2raj4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2raj4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/slpinjare">slpinjare</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document provides an overview of analog layout design. It discusses that analog circuits require careful attention to geometry during layout due to process variations. The analog design flow includes electrical design, physical design involving layout, and fabrication/testing. Key considerations for analog layout include minimizing parasitic resistances and capacitances, reducing noise, and ensuring matching between identical components using techniques like common-centroid layout. Resistors and capacitors must be carefully laid out to minimize non-ideal effects and provide accurate values.</span></div></div><div class="" id=":Raj4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Raj4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-10" aria-haspopup="dialog" aria-controls=":Rar4pkf6:" popovertarget=":Rar4pkf6:" style="anchor-name:--popover-Rar4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/depletion-mosfet-and-digital-mosfet-circuits/249444957"><span class="sr-only">Depletion MOSFET and Digital MOSFET Circuits</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:10" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Depletion MOSFET and Digital MOSFET Circuits" src="https://cdn.slidesharecdn.com/ss_thumbnails/mosfetanditsbiasing-210622060857-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Depletion MOSFET and Digital MOSFET Circuits" src="https://cdn.slidesharecdn.com/ss_thumbnails/mosfetanditsbiasing-210622060857-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Depletion MOSFET and Digital MOSFET Circuits</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Depletion MOSFET and Digital MOSFET Circuits for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rar4pkf6:" popovertarget=":R2rar4pkf6:" style="anchor-name:--popover-R2rar4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rar4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rar4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/VARUNKUMAR391">VARUN KUMAR</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses depletion MOSFET and digital MOSFET circuits. It describes a depletion-type n-channel MOSFET structure on a p-type substrate with two n+ source and drain regions separated by a distance. When a negative gate voltage is applied, it induces positive charges in the semiconductor beneath the oxide, decreasing conductivity and allowing current to flow through the induced channel. Digital MOSFET circuits include the MOS inverter, which acts as a NOT gate, the NAND gate, and the NOR gate. P-channel devices require more area than n-channel devices for the same resistance due to differences in hole and electron mobility.</span></div></div><div class="" id=":Rar4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rar4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-11" aria-haspopup="dialog" aria-controls=":Rb34pkf6:" popovertarget=":Rb34pkf6:" style="anchor-name:--popover-Rb34pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/mos-capacitorabu-syed-kuet/236291008"><span class="sr-only">MOS Capacitor</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:11" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="MOS Capacitor" src="https://cdn.slidesharecdn.com/ss_thumbnails/1543369466ee4209-moscap-200627074545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="MOS Capacitor" src="https://cdn.slidesharecdn.com/ss_thumbnails/1543369466ee4209-moscap-200627074545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">MOS Capacitor</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save MOS Capacitor for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rb34pkf6:" popovertarget=":R2rb34pkf6:" style="anchor-name:--popover-R2rb34pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rb34pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rb34pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/syedsumon">A. S. M. Jannatul Islam</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">1) The document discusses the Metal-Oxide-Semiconductor (MOS) capacitor, which is important for understanding MOSFET operation. 2) It describes the energy band diagrams and carrier accumulation, depletion, and inversion in MOS capacitors under different bias conditions for both p-type and n-type semiconductor substrates. 3) Key concepts covered include the flat-band voltage, threshold voltage, effects of oxide charges, and maximum depletion width.</span></div></div><div class="" id=":Rb34pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rb34pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-12" aria-haspopup="dialog" aria-controls=":Rbb4pkf6:" popovertarget=":Rbb4pkf6:" style="anchor-name:--popover-Rbb4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/WPE/912927"><span class="sr-only">WPE</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:12" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="WPE" src="https://cdn.slidesharecdn.com/ss_thumbnails/WPE-123184826661-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="WPE" src="https://cdn.slidesharecdn.com/ss_thumbnails/WPE-123184826661-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">WPE</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save WPE for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbb4pkf6:" popovertarget=":R2rbb4pkf6:" style="anchor-name:--popover-R2rbb4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbb4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbb4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AdrianOShaughnessy">AdrianOShaughnessy</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses the Well Proximity Effect (WPE) where transistors located near the edge of a well will have different thresholds and currents compared to those located remotely from the edge. The WPE effect occurs for all types of MOS transistors including standard, high, low, and thick/thin oxide devices. It provides a diagram from an IC Mask Design course illustrating the WPE effect.</span></div></div><div class="" id=":Rbb4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbb4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-13" aria-haspopup="dialog" aria-controls=":Rbj4pkf6:" popovertarget=":Rbj4pkf6:" style="anchor-name:--popover-Rbj4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/junctionless-transistors-31680531/31680531"><span class="sr-only">Junctionless transistors</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:13" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Junctionless transistors" src="https://cdn.slidesharecdn.com/ss_thumbnails/jlt-140226124207-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Junctionless transistors" src="https://cdn.slidesharecdn.com/ss_thumbnails/jlt-140226124207-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Junctionless transistors</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Junctionless transistors for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbj4pkf6:" popovertarget=":R2rbj4pkf6:" style="anchor-name:--popover-R2rbj4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbj4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbj4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/pratishthaagnihotri">Pratishtha Agnihotri</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses junctionless transistors as an alternative to traditional transistors. Junctionless transistors have no p-n junctions and instead use uniformly doped semiconductor material. They offer advantages like simpler fabrication without implantation or annealing steps, reduced short channel effects, higher carrier mobility, and lower leakage current. However, they can have greater threshold voltage variability than conventional transistors. The document provides details on the structure and operation of junctionless transistors, comparing them to traditional transistors and discussing their potential to enable further device miniaturization.</span></div></div><div class="" id=":Rbj4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbj4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-14" aria-haspopup="dialog" aria-controls=":Rbr4pkf6:" popovertarget=":Rbr4pkf6:" style="anchor-name:--popover-Rbr4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/latch-up/26735030"><span class="sr-only">Latch up</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:14" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Latch up" src="https://cdn.slidesharecdn.com/ss_thumbnails/latch-up-131001053300-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Latch up" src="https://cdn.slidesharecdn.com/ss_thumbnails/latch-up-131001053300-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Latch up</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Latch up for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbr4pkf6:" popovertarget=":R2rbr4pkf6:" style="anchor-name:--popover-R2rbr4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbr4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbr4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/ishan111">ishan111</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Latch-up occurs in CMOS chips due to the interaction of parasitic bipolar transistors that form a silicon-controlled rectifier between the power and ground rails. This can cause excessive currents and potentially damage devices. Latch-up can be triggered by disturbances that increase the collector current of one of the parasitic transistors, activating positive feedback between the transistors. Guidelines for preventing latch-up include using guard rings connected to power and ground around transistors to reduce resistance and capture minority carriers, as well as placing wells and substrate contacts close to transistor sources.</span></div></div><div class="" id=":Rbr4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbr4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-15" aria-haspopup="dialog" aria-controls=":Rc34pkf6:" popovertarget=":Rc34pkf6:" style="anchor-name:--popover-Rc34pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/lalitgarg/lect5-diffusion"><span class="sr-only">Lect5 Diffusion</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:15" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Lect5 Diffusion" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect5diffusion-13530589681303-phpapp02-121116035615-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Lect5 Diffusion" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect5diffusion-13530589681303-phpapp02-121116035615-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Lect5 Diffusion</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Lect5 Diffusion for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rc34pkf6:" popovertarget=":R2rc34pkf6:" style="anchor-name:--popover-R2rc34pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rc34pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rc34pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/lalitgarg">Lalit Garg</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The key processes involved in IC manufacturing on the wafer include diffusion, ion implantation, photolithography, deposition, and etching. Specifically, diffusion and ion implantation are used to introduce impurities into silicon to control conductivity by either thermal diffusion of dopant atoms into silicon or injection of energetic dopant ions. Fick's first and second laws of diffusion describe diffusion quantitatively, where the flux of diffusing particles is proportional to the concentration gradient according to the first law, and the second law relates the change in concentration over time to the divergence of the flux.</span></div></div><div class="" id=":Rc34pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rc34pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-16" aria-haspopup="dialog" aria-controls=":Rcb4pkf6:" popovertarget=":Rcb4pkf6:" style="anchor-name:--popover-Rcb4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/pass-transistor-logic/14648783"><span class="sr-only">Pass Transistor Logic</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:16" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Pass Transistor Logic" src="https://cdn.slidesharecdn.com/ss_thumbnails/dp-121009041819-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Pass Transistor Logic" src="https://cdn.slidesharecdn.com/ss_thumbnails/dp-121009041819-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Pass Transistor Logic</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Pass Transistor Logic for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcb4pkf6:" popovertarget=":R2rcb4pkf6:" style="anchor-name:--popover-R2rcb4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcb4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcb4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/diwakerpant">Diwaker Pant</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document compares the use of complementary pass-transistor logic (CPL) to conventional CMOS design. CPL uses fewer transistors than CMOS gates, has smaller capacitances, and is faster. A 2:1 multiplexer is designed using both CMOS and CPL in Microwind and DSCH2 layout tools. Simulation results show the CPL multiplexer has lower power consumption, smaller area, faster rise/fall delays compared to the CMOS multiplexer. Therefore, CPL offers advantages over conventional CMOS in terms of speed, area, and power-delay products.</span></div></div><div class="" id=":Rcb4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcb4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-17" aria-haspopup="dialog" aria-controls=":Rcj4pkf6:" popovertarget=":Rcj4pkf6:" style="anchor-name:--popover-Rcj4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/wafer-preparation/123523068"><span class="sr-only">Wafer preparation</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:17" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Wafer preparation" src="https://cdn.slidesharecdn.com/ss_thumbnails/waferpreparation-181120154545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Wafer preparation" src="https://cdn.slidesharecdn.com/ss_thumbnails/waferpreparation-181120154545-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Wafer preparation</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Wafer preparation for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcj4pkf6:" popovertarget=":R2rcj4pkf6:" style="anchor-name:--popover-R2rcj4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcj4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcj4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/SomitSamanto1">SomitSamanto1</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses the preparation process for silicon wafers used in integrated circuit manufacturing. It describes how a silicon crystal is grown and cut into wafers, which then undergo cleaning, etching, planarization, polishing, and inspection steps to produce a smooth, flat surface suitable for microfabrication. Key properties of wafers that are controlled include diameter, thickness, bow, thickness variation, and surface orientation. The presentation concludes that wafers serve as substrates for building microelectronic devices and undergo many process steps before individual circuits are separated and packaged.</span></div></div><div class="" id=":Rcj4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcj4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-18" aria-haspopup="dialog" aria-controls=":Rcr4pkf6:" popovertarget=":Rcr4pkf6:" style="anchor-name:--popover-Rcr4pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/AdrianOShaughnessy/nmi-presentation-sept-2007"><span class="sr-only">Nmi Presentation Sept 2007</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:18" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Nmi Presentation Sept 2007" src="https://cdn.slidesharecdn.com/ss_thumbnails/nmipresentationsept2007-12870663346649-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Nmi Presentation Sept 2007" src="https://cdn.slidesharecdn.com/ss_thumbnails/nmipresentationsept2007-12870663346649-phpapp01-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Nmi Presentation Sept 2007</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Nmi Presentation Sept 2007 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcr4pkf6:" popovertarget=":R2rcr4pkf6:" style="anchor-name:--popover-R2rcr4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcr4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcr4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AdrianOShaughnessy">AdrianOShaughnessy</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses layout challenges at the 90nm technology node. It covers analog layout challenges including shallow trench isolation (STI) stress and well proximity effects that can degrade transistor performance. For RF layout, it discusses the importance of minimizing interconnect and device parasitics. Interconnect parasitics like resistance and capacitance can be reduced by shorter lengths, wider widths, and using higher metal layers. Device parasitics are also discussed and how optimizing the drain area of differential pairs by folding can help minimize parasitic capacitance effects.</span></div></div><div class="" id=":Rcr4pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcr4pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="whatsHot-card-description-19" aria-haspopup="dialog" aria-controls=":Rd34pkf6:" popovertarget=":Rd34pkf6:" style="anchor-name:--popover-Rd34pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/unit-vi-cpldfpga-architecture/80394205"><span class="sr-only">Unit VI CPLD-FPGA Architecture</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:19" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Unit VI CPLD-FPGA Architecture" src="https://cdn.slidesharecdn.com/ss_thumbnails/unitvicpld-fpga-171003081216-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Unit VI CPLD-FPGA Architecture" src="https://cdn.slidesharecdn.com/ss_thumbnails/unitvicpld-fpga-171003081216-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Unit VI CPLD-FPGA Architecture</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Unit VI CPLD-FPGA Architecture for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rd34pkf6:" popovertarget=":R2rd34pkf6:" style="anchor-name:--popover-R2rd34pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rd34pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rd34pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/sudhirshelke73">Principal,Guru Nanak Institute of Technology, Nagpur</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses the architectures and applications of CPLDs and FPGAs. It begins by classifying programmable logic devices and describing simple programmable logic devices like PLDs, PALs, and GALs. It then discusses more complex programmable logic devices like CPLDs, describing their architecture which consists of logic blocks, I/O blocks, and a global interconnect. Finally, it covers field programmable gate arrays including their architecture of configurable logic blocks, I/O blocks, and a programmable interconnect, as well as describing Xilinx's logic cell array architecture for FPGAs.</span></div></div><div class="" id=":Rd34pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rd34pkf6"></div></div><div class="desktop-recs"><div class="Slider_root__c0Jo8"><div class="Slider_scroller__KHjw4"><div class="BottomRecommendationCard_root__gffTk SlideshowCard_root__pD8t4 slideshow-card"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/bhargavveepuri/cmos-process-flow"><span class="sr-only">Cmos process flow</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:16 / 9;--index:0" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A 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style="anchor-name:--popover-Rb1d4pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":Rb1d4pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-Rb1d4pkf6"></div><a class="SlideshowAuthor_root__IkT1_ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/bhargavveepuri">Bhargav Veepuri</a><div class="slideshow-stats SlideshowStats_root__EQOR1"> </div></div></div><div class="BottomRecommendationCard_root__gffTk SlideshowCard_root__pD8t4 slideshow-card"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/vlsi-1/11350508"><span class="sr-only">Vlsi 1</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:16 / 9;--index:1" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Vlsi 1" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi1-120131074151-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Vlsi 1" src="https://cdn.slidesharecdn.com/ss_thumbnails/vlsi1-120131074151-phpapp02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Vlsi 1</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" 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data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/sudhirshelke73">Principal,Guru Nanak Institute of Technology, Nagpur</a><div class="slideshow-stats SlideshowStats_root__EQOR1"> </div></div></div></div><button aria-label="Previous" type="button" class="Slider_arrow__8LCca Slider_prev__YMssa Slider_hidden__rs7nK"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/chevron-left.50b146c0.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><button aria-label="Next" type="button" class="Slider_arrow__8LCca Slider_next__fa9IO"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/chevron-right.9b30ad08.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button></div></div></div></div><div class="bottom-recs BottomRecommendation_root__7aU9w"><h3 class="BottomRecommendation_title__SRj68">Similar to Fabrication of Floating Gate MOS (FLOTOX) <span class="BottomRecommendation_count__4HpLo">(20)</span></h3><div class="BottomRecommendationContent_root__2qm4_"><div class="mobile-recs"><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-0" aria-haspopup="dialog" aria-controls=":R8b59kf6:" popovertarget=":R8b59kf6:" style="anchor-name:--popover-R8b59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fabrication-process/249824383"><span class="sr-only">FABRICATION PROCESS</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:0" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="FABRICATION PROCESS" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabrication-210721150955-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="FABRICATION PROCESS" src="https://cdn.slidesharecdn.com/ss_thumbnails/fabrication-210721150955-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">FABRICATION PROCESS</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save FABRICATION PROCESS for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8b59kf6:" popovertarget=":R2r8b59kf6:" style="anchor-name:--popover-R2r8b59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8b59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8b59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/KUNALRANA48">KUNAL RANA</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Process of IC Fabrication with steps. The content presented are taken from various sources and explained using my understanding. </span></div></div><div class="" id=":R8b59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8b59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-1" aria-haspopup="dialog" aria-controls=":R8j59kf6:" popovertarget=":R8j59kf6:" style="anchor-name:--popover-R8j59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/device-isolation/232194317"><span class="sr-only">Device isolation</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:1" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Device isolation" src="https://cdn.slidesharecdn.com/ss_thumbnails/deviceisolation-200417181128-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Device isolation" src="https://cdn.slidesharecdn.com/ss_thumbnails/deviceisolation-200417181128-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Device isolation</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Device isolation for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8j59kf6:" popovertarget=":R2r8j59kf6:" style="anchor-name:--popover-R2r8j59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8j59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8j59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/nehasharma1355">neha sharma</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses two main techniques for isolating transistors in semiconductor fabrication: LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation). LOCOS uses a thermal oxidation process which results in a "bird's beak" encroachment that wastes surface area. STI improves on LOCOS by etching shallow trenches and filling them with deposited oxide, avoiding the bird's beak effect but requiring more processing steps. Both techniques utilize thermally grown oxides and masks like silicon nitride to selectively grow isolation oxides and define active device areas.</span></div></div><div class="" id=":R8j59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8j59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-2" aria-haspopup="dialog" aria-controls=":R8r59kf6:" popovertarget=":R8r59kf6:" style="anchor-name:--popover-R8r59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-fabrication-vlsi-nmos-pmos-cmos-fabrication/271695968"><span class="sr-only">CMOS FABRICATION - VLSI NMOS, PMOS, CMOS FABRICATION</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:2" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOS FABRICATION - VLSI NMOS, PMOS, CMOS FABRICATION" src="https://cdn.slidesharecdn.com/ss_thumbnails/exampointofviewunit-1-191216080103-240910084315-cbee1c2e-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOS FABRICATION - VLSI NMOS, PMOS, CMOS FABRICATION" src="https://cdn.slidesharecdn.com/ss_thumbnails/exampointofviewunit-1-191216080103-240910084315-cbee1c2e-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">CMOS FABRICATION - VLSI NMOS, PMOS, CMOS FABRICATION</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save CMOS FABRICATION - VLSI NMOS, PMOS, CMOS FABRICATION for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8r59kf6:" popovertarget=":R2r8r59kf6:" style="anchor-name:--popover-R2r8r59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8r59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8r59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" 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class="sr-only">IC design: Microelectronic Technology.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:3" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="IC design: Microelectronic Technology.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/microelectronictechnology-240330061432-8c3a45c7-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="IC design: Microelectronic Technology.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/microelectronictechnology-240330061432-8c3a45c7-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">IC design: Microelectronic Technology.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save IC design: Microelectronic Technology.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9359kf6:" popovertarget=":R2r9359kf6:" style="anchor-name:--popover-R2r9359kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9359kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9359kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/SarmistaSengupta1">SarmistaSengupta1</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Microelectronics involves the study and fabrication of very small electronic components, usually on the micrometer scale. The document discusses the evolution from discrete components to integrated circuits and the advantages of integrated circuits. It describes the basic process of integrated circuit fabrication including wafer preparation, epitaxial growth, oxidation, photolithography, diffusion, metallization, testing, dicing, packaging, and encapsulation. Key steps like Czochralski growth, oxidation, lithography, and diffusion are explained in more detail.</span></div></div><div class="" id=":R9359kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9359kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-4" aria-haspopup="dialog" aria-controls=":R9b59kf6:" popovertarget=":R9b59kf6:" style="anchor-name:--popover-R9b59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/tpp-introduction-evolution-fabrication-pptx/271963904"><span class="sr-only">TPP-INTRODUCTION, EVOLUTION, FABRICATION.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:4" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="TPP-INTRODUCTION, EVOLUTION, FABRICATION.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/tpp-introductionevolutionfabrication-240923063256-77d09ba2-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="TPP-INTRODUCTION, EVOLUTION, FABRICATION.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/tpp-introductionevolutionfabrication-240923063256-77d09ba2-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">TPP-INTRODUCTION, EVOLUTION, FABRICATION.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save TPP-INTRODUCTION, EVOLUTION, FABRICATION.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9b59kf6:" popovertarget=":R2r9b59kf6:" style="anchor-name:--popover-R2r9b59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9b59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9b59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/tejalpage2022">tejalpage2022</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">VLSI EVOLUTION</span></div></div><div class="" id=":R9b59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9b59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-5" aria-haspopup="dialog" aria-controls=":R9j59kf6:" popovertarget=":R9j59kf6:" style="anchor-name:--popover-R9j59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/vlsi-process-integration/233352656"><span class="sr-only">VLSI process integration</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:5" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="VLSI process integration" src="https://cdn.slidesharecdn.com/ss_thumbnails/unit5-200507141456-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="VLSI process integration" src="https://cdn.slidesharecdn.com/ss_thumbnails/unit5-200507141456-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">VLSI process integration</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save VLSI process integration for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9j59kf6:" popovertarget=":R2r9j59kf6:" style="anchor-name:--popover-R2r9j59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9j59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9j59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/nehasharma1355">neha sharma</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">unit 5, IC Technology, RTU 8th sem ECE. isolation techniques (juntion, oxide, LOCOS, trench), bird's beak problem, planarisation, metallisation, CMP (chemical mechanical polishing), SOI (silicon on insulator)</span></div></div><div class="" id=":R9j59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9j59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-6" aria-haspopup="dialog" aria-controls=":R9r59kf6:" popovertarget=":R9r59kf6:" style="anchor-name:--popover-R9r59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fabrication-steps-of-ic/206257747"><span class="sr-only">Fabrication steps of IC</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:6" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Fabrication steps of IC" src="https://cdn.slidesharecdn.com/ss_thumbnails/exampointofviewunit-1-191216080103-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Fabrication steps of IC" src="https://cdn.slidesharecdn.com/ss_thumbnails/exampointofviewunit-1-191216080103-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Fabrication steps of IC</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Fabrication steps of IC for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9r59kf6:" popovertarget=":R2r9r59kf6:" style="anchor-name:--popover-R2r9r59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9r59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9r59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/GowriKishore">Gowri Kishore</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document provides an overview of integrated circuit fabrication processes. It discusses the basic steps including wafer production, epitaxial growth, etching, masking, doping, diffusion, implantation, and metallization. It also describes the fabrication processes for MOSFETs including NMOS, PMOS and CMOS. BiCMOS fabrication is also summarized, which combines BJT and CMOS processes to achieve high speed and low power benefits.</span></div></div><div class="" id=":R9r59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9r59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-7" aria-haspopup="dialog" aria-controls=":Ra359kf6:" popovertarget=":Ra359kf6:" style="anchor-name:--popover-Ra359kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/chapter2-vlsipptx/253617955"><span class="sr-only">Chapter2 VLSI.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:7" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Chapter2 VLSI.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/chapter2vlsi-221016114809-b68aa257-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Chapter2 VLSI.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/chapter2vlsi-221016114809-b68aa257-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Chapter2 VLSI.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Chapter2 VLSI.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2ra359kf6:" popovertarget=":R2ra359kf6:" style="anchor-name:--popover-R2ra359kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2ra359kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2ra359kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/AshishSoni509">AshishSoni509</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document describes the characteristics and fabrication process of epitaxial devices such as diodes and transistors. It discusses the depletion region in p-n junctions and how epitaxial structures can achieve low capacitance, high breakdown voltage, and low series resistance. The fabrication steps for planar epitaxial diodes and transistors are outlined, including starting with an n/n+ epitaxial wafer and diffusing p-type and n-type regions. Bipolar IC manufacturing involves growing an epitaxial layer, isolation diffusion, base diffusion, emitter diffusion, contact masking, and metallization.</span></div></div><div class="" id=":Ra359kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Ra359kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-8" aria-haspopup="dialog" aria-controls=":Rab59kf6:" popovertarget=":Rab59kf6:" style="anchor-name:--popover-Rab59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmostechnodddddaggggggggggggdddedaddddddlogy-ppt/274610191"><span class="sr-only">CMOStechnoDDdDdAGGGGGGGGGGGGdDdEdadDdDdDlogy.ppt</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:8" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOStechnoDDdDdAGGGGGGGGGGGGdDdEdadDdDdDlogy.ppt" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmostechnology-250103095507-b7825c07-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOStechnoDDdDdAGGGGGGGGGGGGdDdEdadDdDdDlogy.ppt" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmostechnology-250103095507-b7825c07-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" 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href="https://www.slideshare.net/slideshow/javarial-seminar/45135450"><span class="sr-only">integrated circuit febrication</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:9" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="integrated circuit febrication" src="https://cdn.slidesharecdn.com/ss_thumbnails/javarialseminar-150225115102-conversion-gate02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="integrated circuit febrication" src="https://cdn.slidesharecdn.com/ss_thumbnails/javarialseminar-150225115102-conversion-gate02-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">integrated circuit febrication</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save integrated circuit febrication for later" role="switch" aria-haspopup="dialog" aria-controls=":R2raj59kf6:" popovertarget=":R2raj59kf6:" style="anchor-name:--popover-R2raj59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2raj59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2raj59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/skylark4">sky lark</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Integrated circuits (ICs) are microscopic arrays of electronic components integrated onto a single chip of semiconductor material. There are several types of ICs based on their structure and fabrication method. Thick and thin film ICs are formed on an insulating substrate using screen printing or vacuum deposition techniques and can contain resistors, capacitors, and inductors but not transistors or diodes. Monolithic ICs integrate all components onto a single silicon wafer using photolithography to diffusively dope regions of the wafer with impurities. Hybrid ICs combine monolithic and thick/thin film fabrication by first forming transistors on a silicon wafer, covering it with an insulating layer, and then adding passive film components and interconnecting them to the underlying</span></div></div><div class="" id=":Raj59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Raj59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-10" aria-haspopup="dialog" aria-controls=":Rar59kf6:" popovertarget=":Rar59kf6:" style="anchor-name:--popover-Rar59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/twin-tab-processing-250928906/250928906"><span class="sr-only">TWIN TAB PROCESSING</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:10" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="TWIN TAB PROCESSING" src="https://cdn.slidesharecdn.com/ss_thumbnails/hssd-220101143959-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="TWIN TAB PROCESSING" src="https://cdn.slidesharecdn.com/ss_thumbnails/hssd-220101143959-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">TWIN TAB PROCESSING</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save TWIN TAB PROCESSING for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rar59kf6:" popovertarget=":R2rar59kf6:" style="anchor-name:--popover-R2rar59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rar59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rar59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/nandininadesan">nandininadesan</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Twin tab processing allows for the separate optimization of NMOS and PMOS transistors on a single substrate. This is done using a lightly doped epitaxial layer deposited on a twin well substrate, upon which n-wells and p-wells are formed. Photolithography is then used to pattern resist and etch wells into the substrate. Dopants are diffused into the wells to form terminals, and isolation and metalization steps follow to complete the transistors on a shared substrate.</span></div></div><div class="" id=":Rar59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rar59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-11" aria-haspopup="dialog" aria-controls=":Rb359kf6:" popovertarget=":Rb359kf6:" style="anchor-name:--popover-Rb359kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/monolithic-implementation-of-parasitic-elements/65303094"><span class="sr-only">Monolithic implementation of parasitic elements</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:11" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Monolithic implementation of parasitic elements" src="https://cdn.slidesharecdn.com/ss_thumbnails/monolithicimplementationofparasiticelements-160824050139-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Monolithic implementation of parasitic elements" src="https://cdn.slidesharecdn.com/ss_thumbnails/monolithicimplementationofparasiticelements-160824050139-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Monolithic implementation of parasitic elements</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Monolithic implementation of parasitic elements for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rb359kf6:" popovertarget=":R2rb359kf6:" style="anchor-name:--popover-R2rb359kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rb359kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rb359kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/Gopichand_Naguboina">GOPICHAND NAGUBOINA</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation gives a brief about how a parasitic elements are fabricated using monolithic implementation</span></div></div><div class="" id=":Rb359kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rb359kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-12" aria-haspopup="dialog" aria-controls=":Rbb59kf6:" popovertarget=":Rbb59kf6:" style="anchor-name:--popover-Rbb59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/chapter-1ic-fabricationpptx/265092390"><span class="sr-only">Chapter 1-IC Fabrication.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:12" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Chapter 1-IC Fabrication.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/chapter1-icfabrication-240103082553-47fe40ce-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Chapter 1-IC Fabrication.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/chapter1-icfabrication-240103082553-47fe40ce-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Chapter 1-IC Fabrication.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Chapter 1-IC Fabrication.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbb59kf6:" popovertarget=":R2rbb59kf6:" style="anchor-name:--popover-R2rbb59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbb59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbb59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/karthikhce">Karthik Prof.</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Integrated circuits have increased dramatically in complexity over time due to advances in fabrication technology allowing for higher densities of components on silicon chips. The fabrication process involves growing high purity silicon crystals, depositing layers, doping for conductivity, patterning circuits using photolithography, and packaging individual dies. Advances like shrinking transistor sizes and cleaner room environments have allowed integration to scale while maintaining reliability.</span></div></div><div class="" id=":Rbb59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbb59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-13" aria-haspopup="dialog" aria-controls=":Rbj59kf6:" popovertarget=":Rbj59kf6:" style="anchor-name:--popover-Rbj59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-nwellpptx/255919682"><span class="sr-only">CMOS N-WELL.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:13" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOS N-WELL.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosn-well-230219131336-37e8f472-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOS N-WELL.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmosn-well-230219131336-37e8f472-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">CMOS N-WELL.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save CMOS N-WELL.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbj59kf6:" popovertarget=":R2rbj59kf6:" style="anchor-name:--popover-R2rbj59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbj59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbj59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/Balaji391305">Balaji391305</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document outlines the 20 step process for fabricating an N-well CMOS transistor on a silicon substrate. Key steps include: 1) Growing a silicon dioxide layer on the P-type substrate through oxidation. 2) Depositing and patterning a photoresist layer using a mask to selectively expose regions for diffusion. 3) Forming the N-well region by diffusing N-type impurities into the exposed areas of the substrate. 4) Depositing polysilicon and patterning it to form the transistor gates. 5) Creating source and drain regions through masked diffusion of N-type and P-type impurities. 6) Forming metal interconnections</span></div></div><div class="" id=":Rbj59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbj59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-14" aria-haspopup="dialog" aria-controls=":Rbr59kf6:" popovertarget=":Rbr59kf6:" style="anchor-name:--popover-Rbr59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/silicon-gate-processespptx/255130807"><span class="sr-only">SILICON GATE PROCESSES.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:14" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="SILICON GATE PROCESSES.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/silicongateprocesses-230104052158-d0da9d27-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="SILICON GATE PROCESSES.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/silicongateprocesses-230104052158-d0da9d27-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">SILICON GATE PROCESSES.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save SILICON GATE PROCESSES.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbr59kf6:" popovertarget=":R2rbr59kf6:" style="anchor-name:--popover-R2rbr59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbr59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbr59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/ssuser515b091">ssuser515b091</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document discusses different CMOS fabrication processes including p-well, n-well, twin-tub, and silicon-on-insulator. It focuses on describing the p-well CMOS fabrication process. This involves growing a deep p-well diffusion into an n-type substrate using Mask 1. Mask 2 is then used to define thin oxide regions for p- and n-transistors and wires. Additional masks are applied for polysilicon patterning, p-diffusion, n-diffusion, contact cuts, metal layer patterning, and passivation openings.</span></div></div><div class="" id=":Rbr59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbr59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-15" aria-haspopup="dialog" aria-controls=":Rc359kf6:" popovertarget=":Rc359kf6:" style="anchor-name:--popover-Rc359kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/monolithic-ic-processes-pptpptx/260262398"><span class="sr-only">MONOLITHIC IC PROCESSES ppt.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:15" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="MONOLITHIC IC PROCESSES ppt.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/monolithicicprocessesppt-230828155724-87e07d1e-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="MONOLITHIC IC PROCESSES ppt.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/monolithicicprocessesppt-230828155724-87e07d1e-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">MONOLITHIC IC PROCESSES ppt.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save MONOLITHIC IC PROCESSES ppt.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rc359kf6:" popovertarget=":R2rc359kf6:" style="anchor-name:--popover-R2rc359kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rc359kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rc359kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/ParasSingh894545">ParasSingh894545</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">MONOLITHIC IC PROCESSES A monolithic integrated circuit (IC) is a set of circuitry on a single semiconductor plate or chip rather than built of separate elements as a discrete circuit is.</span></div></div><div class="" id=":Rc359kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rc359kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-16" aria-haspopup="dialog" aria-controls=":Rcb59kf6:" popovertarget=":Rcb59kf6:" style="anchor-name:--popover-Rcb59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fundamentals-oficchipmanufacturingwin974/237766636"><span class="sr-only">Fundamentals of-ic-chip-manufacturing-win974</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:16" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Fundamentals of-ic-chip-manufacturing-win974" src="https://cdn.slidesharecdn.com/ss_thumbnails/fundamentals-of-ic-chip-manufacturing-win974-200811233919-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Fundamentals of-ic-chip-manufacturing-win974" src="https://cdn.slidesharecdn.com/ss_thumbnails/fundamentals-of-ic-chip-manufacturing-win974-200811233919-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Fundamentals of-ic-chip-manufacturing-win974</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Fundamentals of-ic-chip-manufacturing-win974 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcb59kf6:" popovertarget=":R2rcb59kf6:" style="anchor-name:--popover-R2rcb59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcb59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcb59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/SureshBiligiri">Suresh Biligiri</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document provides an overview of integrated circuit (IC) manufacturing. It discusses what an IC is, provides a brief history, and outlines the key steps in the manufacturing process. The process begins with purifying silicon ingots, slicing them into wafers, and polishing the wafers. The wafers then undergo multiple lithography, etching, and deposition steps to build transistors and interconnects. After processing, the dies on each wafer are tested and good dies are diced and packaged. The document explains some of the basic wafer processing steps like oxidation, resist coating, lithography, and etching in more detail. It aims to provide fundamentals of IC manufacturing.</span></div></div><div class="" id=":Rcb59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcb59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-17" aria-haspopup="dialog" aria-controls=":Rcj59kf6:" popovertarget=":Rcj59kf6:" style="anchor-name:--popover-Rcj59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/my-vlsipptx/255536378"><span class="sr-only">My VLSI.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:17" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="My VLSI.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/myvlsi-230126132649-ea1decc1-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="My VLSI.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/myvlsi-230126132649-ea1decc1-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">My VLSI.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save My VLSI.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcj59kf6:" popovertarget=":R2rcj59kf6:" style="anchor-name:--popover-R2rcj59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcj59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcj59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/chiranjeevimuppala2">chiranjeevimuppala2</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document provides an overview of VLSI design and MOS transistors. It discusses the basic steps of IC fabrication for PMOS, NMOS, CMOS, and BiCMOS processes. It also covers MOS transistor switches, including the MOSFET, transmission gate, and pass transistor logic. The document then examines the basic electrical properties of MOS and BiCMOS circuits, such as threshold voltage, body effect, and Ids-Vds relationships. It provides details on SOI fabrication processes and compares CMOS to bipolar technologies.</span></div></div><div class="" id=":Rcj59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcj59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-18" aria-haspopup="dialog" aria-controls=":Rcr59kf6:" popovertarget=":Rcr59kf6:" style="anchor-name:--popover-Rcr59kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/ic-fabrication-and-its-types-with-real-life-applicationspptx/266769795"><span class="sr-only">IC fabrication and its types with real life applications.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:18" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="IC fabrication and its types with real life applications.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/icfabrication-240313145341-a239e6fc-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="IC fabrication and its types with real life applications.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/icfabrication-240313145341-a239e6fc-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">IC fabrication and its types with real life applications.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save IC fabrication and its types with real life applications.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcr59kf6:" popovertarget=":R2rcr59kf6:" style="anchor-name:--popover-R2rcr59kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcr59kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcr59kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/nishanthasmi">Nishanth Asmi</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The document describes the basic fabrication processes used for integrated circuits and transistors. It discusses the following key points in 3 sentences: The document outlines the basic steps used to fabricate diodes and transistors, including the alloy method and diffused junction method. It then describes several transistor fabrication techniques such as alloy transistors, microalloy transistors, and diffused planar transistors. Finally, it discusses integrated circuit fabrication processes like monolithic, thin film, thick film, and hybrid approaches as well as common IC packaging methods including metal cans, dual in-line packages, and surface mounting packages.</span></div></div><div class="" id=":Rcr59kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcr59kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="similarTo-card-description-19" aria-haspopup="dialog" aria-controls=":Rd359kf6:" popovertarget=":Rd359kf6:" style="anchor-name:--popover-Rd359kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/3-cmos-fabricationppt-important-to-read/265249838"><span class="sr-only">3. CMOS Fabrication.ppt important to read</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:19" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="3. CMOS Fabrication.ppt important to read" src="https://cdn.slidesharecdn.com/ss_thumbnails/3-240109103137-d1d582ec-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="3. CMOS Fabrication.ppt important to read" src="https://cdn.slidesharecdn.com/ss_thumbnails/3-240109103137-d1d582ec-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">3. CMOS Fabrication.ppt important to read</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save 3. CMOS Fabrication.ppt important to read for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rd359kf6:" popovertarget=":R2rd359kf6:" style="anchor-name:--popover-R2rd359kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rd359kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rd359kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/Sahithikairamkonda">Sahithikairamkonda</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This document discusses different CMOS fabrication processes, including P-well, N-well, twin tub, and silicon on insulator (SOI). The P-well process involves diffusing a deep p-well into an n-type substrate using multiple masks. The N-well process creates n-well regions in a p-type substrate. Twin tub uses a high resistivity substrate and creates separate n-well and p-well regions. SOI places a thin silicon layer on an insulating substrate like sapphire to reduce capacitance and isolate transistors.</span></div></div><div class="" id=":Rd359kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rd359kf6"></div></div><div class="desktop-recs"><div class="Slider_root__c0Jo8"><div class="Slider_scroller__KHjw4"><div class="BottomRecommendationCard_root__gffTk SlideshowCard_root__pD8t4 slideshow-card"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fabrication-process/249824383"><span class="sr-only">FABRICATION PROCESS</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:16 / 9;--index:0" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="FABRICATION PROCESS" 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This presentation is strongly based on the contents from the references: Computer Networks by Behrouz A. Forouzan and Firouz Mosharraf and Computer Networks by Andrew S. Tanenbaum. </span></div></div><div class="" id=":R8b5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8b5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-1" aria-haspopup="dialog" aria-controls=":R8j5pkf6:" popovertarget=":R8j5pkf6:" style="anchor-name:--popover-R8j5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/error-correcting-and-error-detecting-codes-pptx/274627392"><span class="sr-only">Error Correcting and Error Detecting Codes.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:1" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Error Correcting and Error Detecting Codes.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/errorcorrectinganderrordetectingcodes-250104060326-146d749f-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Error Correcting and Error Detecting Codes.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/errorcorrectinganderrordetectingcodes-250104060326-146d749f-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Error Correcting and Error Detecting Codes.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Error Correcting and Error Detecting Codes.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8j5pkf6:" popovertarget=":R2r8j5pkf6:" style="anchor-name:--popover-R2r8j5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8j5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8j5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation highlights various error correcting and error detection codes. This shall be useful for students in information theory and coding, computer networks, security, etc.</span></div></div><div class="" id=":R8j5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8j5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-2" aria-haspopup="dialog" aria-controls=":R8r5pkf6:" popovertarget=":R8r5pkf6:" style="anchor-name:--popover-R8r5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/dsp-processors-versus-asics/243274680"><span class="sr-only">DSP Processors versus ASICs</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:2" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="DSP Processors versus ASICs" src="https://cdn.slidesharecdn.com/ss_thumbnails/1-210223112022-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="DSP Processors versus ASICs" src="https://cdn.slidesharecdn.com/ss_thumbnails/1-210223112022-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">DSP Processors versus ASICs</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save DSP Processors versus ASICs for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8r5pkf6:" popovertarget=":R2r8r5pkf6:" style="anchor-name:--popover-R2r8r5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8r5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8r5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The signal processing algorithms can be implemented on hardware using various strategies such as DSP processors and ASIC. This PPT compares and contrasts the two methods.</span></div></div><div class="" id=":R8r5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8r5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-3" aria-haspopup="dialog" aria-controls=":R935pkf6:" popovertarget=":R935pkf6:" style="anchor-name:--popover-R935pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/keypad-interfacing-with-8051-microcontroller-238800094/238800094"><span class="sr-only">Keypad Interfacing with 8051 Microcontroller</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:3" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Keypad Interfacing with 8051 Microcontroller" src="https://cdn.slidesharecdn.com/ss_thumbnails/interfacing4-201008182322-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Keypad Interfacing with 8051 Microcontroller" src="https://cdn.slidesharecdn.com/ss_thumbnails/interfacing4-201008182322-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Keypad Interfacing with 8051 Microcontroller</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Keypad Interfacing with 8051 Microcontroller for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r935pkf6:" popovertarget=":R2r935pkf6:" style="anchor-name:--popover-R2r935pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r935pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r935pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Keypad is a common interface with any microcontroller. This presentation gives details of keypad can be interfaced with 8051. The key pressed may be dispalyed on LCD/7 segment/LED displays.</span></div></div><div class="" id=":R935pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R935pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-4" aria-haspopup="dialog" aria-controls=":R9b5pkf6:" popovertarget=":R9b5pkf6:" style="anchor-name:--popover-R9b5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/asic-design-flow-digital-design/238762008"><span class="sr-only">ASIC design Flow (Digital Design)</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:4" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="ASIC design Flow (Digital Design)" src="https://cdn.slidesharecdn.com/ss_thumbnails/edatools-201006111739-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="ASIC design Flow (Digital Design)" src="https://cdn.slidesharecdn.com/ss_thumbnails/edatools-201006111739-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">ASIC design Flow (Digital Design)</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save ASIC design Flow (Digital Design) for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9b5pkf6:" popovertarget=":R2r9b5pkf6:" style="anchor-name:--popover-R2r9b5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9b5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9b5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This Presentation discusses the various terminology involved in ASIC design. Each step is described with the help of a flowchart.</span></div></div><div class="" id=":R9b5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9b5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-5" aria-haspopup="dialog" aria-controls=":R9j5pkf6:" popovertarget=":R9j5pkf6:" style="anchor-name:--popover-R9j5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/fpga-architectures-and-applications/233103092"><span class="sr-only">Fpga architectures and applications</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:5" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Fpga architectures and applications" src="https://cdn.slidesharecdn.com/ss_thumbnails/fpgaarchitecturesandapplications-200503200040-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Fpga architectures and applications" src="https://cdn.slidesharecdn.com/ss_thumbnails/fpgaarchitecturesandapplications-200503200040-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Fpga architectures and applications</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Fpga architectures and applications for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9j5pkf6:" popovertarget=":R2r9j5pkf6:" style="anchor-name:--popover-R2r9j5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9j5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9j5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">FPGAs can be programmed after manufacturing to implement custom logic functions. They contain programmable logic blocks and interconnects that can be configured to create custom circuits. FPGAs provide flexibility compared to ASICs but have higher per-unit costs. The FPGA architecture consists of configurable logic blocks, programmable interconnects, and I/O blocks. Configurable logic blocks contain LUTs that implement logic functions. Programmable interconnects connect the logic blocks, and I/O blocks interface with external components. FPGAs are commonly used for prototyping, emulation, parallel computing, and other applications that require customizable hardware.</span></div></div><div class="" id=":R9j5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9j5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-6" aria-haspopup="dialog" aria-controls=":R9r5pkf6:" popovertarget=":R9r5pkf6:" style="anchor-name:--popover-R9r5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/lcd-interacing-with-8051/232248947"><span class="sr-only">LCD Interacing with 8051</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:6" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="LCD Interacing with 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/esinterfacing3-200419054929-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="LCD Interacing with 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/esinterfacing3-200419054929-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">LCD Interacing with 8051</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save LCD Interacing with 8051 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9r5pkf6:" popovertarget=":R2r9r5pkf6:" style="anchor-name:--popover-R2r9r5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9r5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9r5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation is all about interfacing of a character LCD with 8051 micro-controller. It discusses various LCD commands, LCD pin description and a simple LCD working code in assembly for interfacing.</span></div></div><div class="" id=":R9r5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9r5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-7" aria-haspopup="dialog" aria-controls=":Ra35pkf6:" popovertarget=":Ra35pkf6:" style="anchor-name:--popover-Ra35pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/interrupts-in-8051/118860877"><span class="sr-only">Interrupts in 8051</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:7" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Interrupts in 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect8-181009123344-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Interrupts in 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect8-181009123344-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Interrupts in 8051</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Interrupts in 8051 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2ra35pkf6:" popovertarget=":R2ra35pkf6:" style="anchor-name:--popover-R2ra35pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2ra35pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2ra35pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses the support for interrupts in 8051. The interrupt types, interrupts versus polling etc are discussed. The register formats of IE, IP register are discussed. The concept of priority among the interrupts is discussed.</span></div></div><div class="" id=":Ra35pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Ra35pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-8" aria-haspopup="dialog" aria-controls=":Rab5pkf6:" popovertarget=":Rab5pkf6:" style="anchor-name:--popover-Rab5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/serial-communication-in-8051-118860535/118860535"><span class="sr-only">Serial Communication in 8051</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:8" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Serial Communication in 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect7-181009123028-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Serial Communication in 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/lect7-181009123028-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Serial Communication in 8051</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Serial Communication in 8051 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rab5pkf6:" popovertarget=":R2rab5pkf6:" style="anchor-name:--popover-R2rab5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rab5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rab5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses the Serial Communication features in 8051, the support for UART. It also discusses serial vs parallel communication, simplex, duplex and full-duplex modes, MAX232, RS232 standards</span></div></div><div class="" id=":Rab5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rab5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-9" aria-haspopup="dialog" aria-controls=":Raj5pkf6:" popovertarget=":Raj5pkf6:" style="anchor-name:--popover-Raj5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/spi-bus-protocol/95585413"><span class="sr-only">SPI Bus Protocol</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:9" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="SPI Bus Protocol" src="https://cdn.slidesharecdn.com/ss_thumbnails/spi-180501092933-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="SPI Bus Protocol" src="https://cdn.slidesharecdn.com/ss_thumbnails/spi-180501092933-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">SPI Bus Protocol</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save SPI Bus Protocol for later" role="switch" aria-haspopup="dialog" aria-controls=":R2raj5pkf6:" popovertarget=":R2raj5pkf6:" style="anchor-name:--popover-R2raj5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2raj5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2raj5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses about Serial Bus protocol SPI. It discusses the various features of the protocol, its merits and demerits and application</span></div></div><div class="" id=":Raj5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Raj5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-10" aria-haspopup="dialog" aria-controls=":Rar5pkf6:" popovertarget=":Rar5pkf6:" style="anchor-name:--popover-Rar5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/shudhanshu29/i2c-protocol-94259889"><span class="sr-only">I2C Protocol</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:10" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="I2C Protocol" src="https://cdn.slidesharecdn.com/ss_thumbnails/i2c-180418191554-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="I2C Protocol" src="https://cdn.slidesharecdn.com/ss_thumbnails/i2c-180418191554-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">I2C Protocol</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save I2C Protocol for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rar5pkf6:" popovertarget=":R2rar5pkf6:" style="anchor-name:--popover-R2rar5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rar5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rar5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses the details of the I2C protocol and interfacing of EEPROM with 8051 based on I2C protocol. It also discusses the other applications of I2C protocol</span></div></div><div class="" id=":Rar5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rar5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-11" aria-haspopup="dialog" aria-controls=":Rb35pkf6:" popovertarget=":Rb35pkf6:" style="anchor-name:--popover-Rb35pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/introduction-to-8051-timercounter/89001253"><span class="sr-only">Introduction to 8051 Timer/Counter</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:11" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Introduction to 8051 Timer/Counter" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect6-180226185149-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Introduction to 8051 Timer/Counter" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect6-180226185149-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Introduction to 8051 Timer/Counter</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Introduction to 8051 Timer/Counter for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rb35pkf6:" popovertarget=":R2rb35pkf6:" style="anchor-name:--popover-R2rb35pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rb35pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rb35pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation is about brief introduction to Timers/Counters in Intel 8051. It discusses the registers involved and modes of programming timers in 8051</span></div></div><div class="" id=":Rb35pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rb35pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-12" aria-haspopup="dialog" aria-controls=":Rbb5pkf6:" popovertarget=":Rbb5pkf6:" style="anchor-name:--popover-Rbb5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/shudhanshu29/intel-8051-programming-in-c"><span class="sr-only">Intel 8051 Programming in C</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:12" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Intel 8051 Programming in C" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect5-180226183105-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Intel 8051 Programming in C" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect5-180226183105-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Intel 8051 Programming in C</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Intel 8051 Programming in C for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbb5pkf6:" popovertarget=":R2rbb5pkf6:" style="anchor-name:--popover-R2rbb5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbb5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbb5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation gives the details about the data types available in Embedded C. It also discusses the pros and cons of writing codes in C for 8051. Different example codes are considered.</span></div></div><div class="" id=":Rbb5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbb5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-13" aria-haspopup="dialog" aria-controls=":Rbj5pkf6:" popovertarget=":Rbj5pkf6:" style="anchor-name:--popover-Rbj5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/hardware-view-of-intel-8051-88999385/88999385"><span class="sr-only">Hardware View of Intel 8051</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:13" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Hardware View of Intel 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect3-180226182905-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Hardware View of Intel 8051" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect3-180226182905-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Hardware View of Intel 8051</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Hardware View of Intel 8051 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbj5pkf6:" popovertarget=":R2rbj5pkf6:" style="anchor-name:--popover-R2rbj5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbj5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbj5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses the hardware details of 8051 microcontroller, viz. the pin description, reset circuit, port architectures, oscillator circuit and machine cycle etc in 8051</span></div></div><div class="" id=":Rbj5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbj5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-14" aria-haspopup="dialog" aria-controls=":Rbr5pkf6:" popovertarget=":Rbr5pkf6:" style="anchor-name:--popover-Rbr5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/shudhanshu29/architecture-of-the-8051-microcontroller"><span class="sr-only">Architecture of the Intel 8051 Microcontroller</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:14" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Architecture of the Intel 8051 Microcontroller" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect2-180226181633-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Architecture of the Intel 8051 Microcontroller" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect2-180226181633-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Architecture of the Intel 8051 Microcontroller</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Architecture of the Intel 8051 Microcontroller for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rbr5pkf6:" popovertarget=":R2rbr5pkf6:" style="anchor-name:--popover-R2rbr5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rbr5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rbr5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses the internal architecture of Intel 8051. It discusses basic families of 8051, the programmer view, register sets and memory organiszation of 8051</span></div></div><div class="" id=":Rbr5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rbr5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-15" aria-haspopup="dialog" aria-controls=":Rc35pkf6:" popovertarget=":Rc35pkf6:" style="anchor-name:--popover-Rc35pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/introduction-to-embedded-systems-88898475/88898475"><span class="sr-only">Introduction to Embedded Systems</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:15" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Introduction to Embedded Systems" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect11-180225163410-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Introduction to Embedded Systems" src="https://cdn.slidesharecdn.com/ss_thumbnails/eslect11-180225163410-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Introduction to Embedded Systems</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Introduction to Embedded Systems for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rc35pkf6:" popovertarget=":R2rc35pkf6:" style="anchor-name:--popover-R2rc35pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rc35pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rc35pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation gives a brief over view of Embedded Systems. It describes the common characteristics of Embedded systems, the design metrics, processor technologies and also summarizes differences between Microcontrollers and Microprocessors.</span></div></div><div class="" id=":Rc35pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rc35pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-16" aria-haspopup="dialog" aria-controls=":Rcb5pkf6:" popovertarget=":Rcb5pkf6:" style="anchor-name:--popover-Rcb5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/cmos-logic-88640645/88640645"><span class="sr-only">CMOS Logic</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:16" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="CMOS Logic" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmoslogic-180222184159-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="CMOS Logic" src="https://cdn.slidesharecdn.com/ss_thumbnails/cmoslogic-180222184159-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">CMOS Logic</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save CMOS Logic for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcb5pkf6:" popovertarget=":R2rcb5pkf6:" style="anchor-name:--popover-R2rcb5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcb5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcb5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation discusses the basics about how to realize logic functions using Static CMOS logic. This presentation discusses about how to realize a Boolean expression by drawing a Pull-up network and a pull-down network. It also briefs about the pass transistor logic and the concepts of weak and strong outputs.</span></div></div><div class="" id=":Rcb5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcb5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-17" aria-haspopup="dialog" aria-controls=":Rcj5pkf6:" popovertarget=":Rcj5pkf6:" style="anchor-name:--popover-Rcj5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/interconnects-in-reconfigurable-architectures-88639852/88639852"><span class="sr-only">Interconnects in Reconfigurable Architectures</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:17" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Interconnects in Reconfigurable Architectures" src="https://cdn.slidesharecdn.com/ss_thumbnails/interconnections7-180222183426-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Interconnects in Reconfigurable Architectures" src="https://cdn.slidesharecdn.com/ss_thumbnails/interconnections7-180222183426-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Interconnects in Reconfigurable Architectures</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Interconnects in Reconfigurable Architectures for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcj5pkf6:" popovertarget=":R2rcj5pkf6:" style="anchor-name:--popover-R2rcj5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcj5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcj5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Interconnects occupy upto 90% of the area in Reconfigurable Architectures and affect the speed and noise of the chip. This presentations gives briefs about interconnects, particularly in context of Reconfigurable Architecture (eg FPGAs) </span></div></div><div class="" id=":Rcj5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcj5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-18" aria-haspopup="dialog" aria-controls=":Rcr5pkf6:" popovertarget=":Rcr5pkf6:" style="anchor-name:--popover-Rcr5pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/introduction-to-fpgas-86389535/86389535"><span class="sr-only">Introduction to FPGAs</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:18" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Introduction to FPGAs" src="https://cdn.slidesharecdn.com/ss_thumbnails/introductiontofpgas-180119061640-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Introduction to FPGAs" src="https://cdn.slidesharecdn.com/ss_thumbnails/introductiontofpgas-180119061640-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Introduction to FPGAs</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Introduction to FPGAs for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rcr5pkf6:" popovertarget=":R2rcr5pkf6:" style="anchor-name:--popover-R2rcr5pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rcr5pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rcr5pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">This presentation gives an overview of FPGA devices. An FPGA is a device that contains a matrix of re-configurable gate array logic circuitry. When a FPGA is configured, the internal circuitry is connected in a way that creates a hardware implementation of the software application. FPGA devices can deliver the performance and reliability of dedicated hardware circuitry.</span></div></div><div class="" id=":Rcr5pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rcr5pkf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="moreFromUser-card-description-19" aria-haspopup="dialog" aria-controls=":Rd35pkf6:" popovertarget=":Rd35pkf6:" style="anchor-name:--popover-Rd35pkf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/design-and-implementation-of-a-gps-based-personal-tracking-system-85814096/85814096"><span class="sr-only">Design and Implementation of a GPS based Personal Tracking System</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:19" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Design and Implementation of a GPS based Personal Tracking System" src="https://cdn.slidesharecdn.com/ss_thumbnails/07853253-180107072732-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Design and Implementation of a GPS based Personal Tracking System" src="https://cdn.slidesharecdn.com/ss_thumbnails/07853253-180107072732-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Design and Implementation of a GPS based Personal Tracking System</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Design and Implementation of a GPS based Personal Tracking System for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rd35pkf6:" popovertarget=":R2rd35pkf6:" style="anchor-name:--popover-R2rd35pkf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rd35pkf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rd35pkf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/shudhanshu29">Sudhanshu Janwadkar</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Design and Implementation of a GPS based Personal Tracking System Tracking based applications have been quite popular in recent times. Most of them have been limited to commercial applications such as vehicular tracking (e.g tracking of a train etc). However, not much work has been done towards design of a personal tracking system. Our Research work is an attempt to design such personal tracking system. In this paper, we have shared glimpses of our research work. The objective of our research project is to design & develop a system which is capable of tracking and monitoring a person, object or any other asset of importance (called as target). The system uses GPS to determine the exact position of the target. The target is aided with a compact handheld device which consists of a GPS receiver and GSM modem. GPS receiver obtains location coordinates (viz. Latitude & Longitude) from GPS satellites. The location information in NMEA format is decoded, formatted and sent to control station, through a GSM modem. Due to use of Open CPU development platform, no external Microcontroller is required, with additional advantage of compact size product, reduced design & development time and reduced cost. Thus, the proposed system is able to track the accurate location of target. This system finds applications in tracking old-age people, tracking animals in forest, tracking delivery of goods etc. Our final designed system is a small-size compact l.S"X3.7S" Tracker system with position accuracy error <30m (100 feet).</span></div></div><div class="" id=":Rd35pkf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rd35pkf6"></div></div><div class="desktop-recs"><div class="Slider_root__c0Jo8"><div class="Slider_scroller__KHjw4"><div class="BottomRecommendationCard_root__gffTk SlideshowCard_root__pD8t4 slideshow-card"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/presentation-on-elementary-data-link-protocols/274627490"><span class="sr-only">Presentation on Elementary Data Link Protocols</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:16 / 9;--index:0" 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loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Rass MELAI : an Internet MELA Quiz Finals - El Dorado 2025</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Rass MELAI : an Internet MELA Quiz Finals - El Dorado 2025 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8b69kf6:" popovertarget=":R2r8b69kf6:" style="anchor-name:--popover-R2r8b69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8b69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8b69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/ConquiztadorsTheQuiz">Conquiztadors- the Quiz Society of Sri Venkateswara College</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Finals of Rass MELAI : a Music, Entertainment, Literature, Arts and Internet Culture Quiz organized by Conquiztadors, the Quiz society of Sri Venkateswara College under their annual quizzing fest El Dorado 2025. </span></div></div><div class="" id=":R8b69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8b69kf6"></div><div class="separator Separator_root__70Ime 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role="switch" aria-haspopup="dialog" aria-controls=":R2r8j69kf6:" popovertarget=":R2r8j69kf6:" style="anchor-name:--popover-R2r8j69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8j69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8j69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/CelineGeorge1">Celine George</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Sub Task Management in the Odoo Project Module allows users to break down large tasks into smaller, more manageable pieces called sub-tasks. This feature helps in organizing and tracking complex projects by dividing work into smaller steps, each with its own deadlines, assignees, and progress tracking.</span></div></div><div class="" id=":R8j69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8j69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-2" aria-haspopup="dialog" aria-controls=":R8r69kf6:" popovertarget=":R8r69kf6:" style="anchor-name:--popover-R8r69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/pests-of-cruciferous-crops-their-damage-symptoms-and-management-practices-pptx/276549318"><span class="sr-only">Pests of Cruciferous Crops, their Damage Symptoms and Management Practices.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:2" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Pests of Cruciferous Crops, their Damage Symptoms and Management Practices.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/pestsofcruciferouscropsrepaired-250311110514-7bd945b5-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Pests of Cruciferous Crops, their Damage Symptoms and Management Practices.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/pestsofcruciferouscropsrepaired-250311110514-7bd945b5-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Pests of Cruciferous Crops, their Damage Symptoms and Management Practices.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Pests of Cruciferous Crops, their Damage Symptoms and Management Practices.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r8r69kf6:" popovertarget=":R2r8r69kf6:" style="anchor-name:--popover-R2r8r69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r8r69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r8r69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/DeepaliShid">Deepali Shid</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Pests of Horticultural Crops Pests of Cruciferous Crops like Diamond back moth, Aphids, Painted bug, Cabbage butterfly, Leaf eating caterpillar, Flea beetle, Head borer, Mustard saw fly</span></div></div><div class="" id=":R8r69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R8r69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-3" aria-haspopup="dialog" aria-controls=":R9369kf6:" popovertarget=":R9369kf6:" style="anchor-name:--popover-R9369kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/8-essential-skills-application-of-number-ratio/276661887"><span class="sr-only">8. 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Essential Skills: Application of Number: Ratio</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save 8. Essential Skills: Application of Number: Ratio for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9369kf6:" popovertarget=":R2r9369kf6:" style="anchor-name:--popover-R2r9369kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9369kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9369kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/leigh441292">leigh441292</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">AON: Ratio</span></div></div><div class="" id=":R9369kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9369kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-4" aria-haspopup="dialog" aria-controls=":R9b69kf6:" popovertarget=":R9b69kf6:" style="anchor-name:--popover-R9b69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/how-to-add-notes-sections-catalog-in-odoo-18/276591354"><span class="sr-only">How to Add Notes, Sections & Catalog in Odoo 18</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:4" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="How to Add Notes, Sections & Catalog in Odoo 18" src="https://cdn.slidesharecdn.com/ss_thumbnails/howtoaddnotessectionscataloginodoo18-250312054437-7834f966-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="How to Add Notes, Sections & Catalog in Odoo 18" src="https://cdn.slidesharecdn.com/ss_thumbnails/howtoaddnotessectionscataloginodoo18-250312054437-7834f966-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">How to Add Notes, Sections & Catalog in Odoo 18</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save How to Add Notes, Sections & Catalog in Odoo 18 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9b69kf6:" popovertarget=":R2r9b69kf6:" style="anchor-name:--popover-R2r9b69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9b69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9b69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/CelineGeorge1">Celine George</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">In this slide, we’ll discuss how to add notes, sections, and catalogs in Odoo 18. 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Custom sections can be created to organize and categorize information effectively.</span></div></div><div class="" id=":R9b69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9b69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-5" aria-haspopup="dialog" aria-controls=":R9j69kf6:" popovertarget=":R9j69kf6:" style="anchor-name:--popover-R9j69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/lecture-9-unit-3-interior-of-the-earth-pptx/276613657"><span class="sr-only">Lecture 9 unit 3 Interior of the Earth.pptx</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:5" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Lecture 9 unit 3 Interior of the Earth.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/lecture9unit3-250312151715-957a69e4-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Lecture 9 unit 3 Interior of the Earth.pptx" src="https://cdn.slidesharecdn.com/ss_thumbnails/lecture9unit3-250312151715-957a69e4-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Lecture 9 unit 3 Interior of the Earth.pptx</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Lecture 9 unit 3 Interior of the Earth.pptx for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9j69kf6:" popovertarget=":R2r9j69kf6:" style="anchor-name:--popover-R2r9j69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9j69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9j69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/abbas999889">Abbas Hyder , Assistant Professor</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only"> Interior of the Earth </span></div></div><div class="" id=":R9j69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9j69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-6" aria-haspopup="dialog" aria-controls=":R9r69kf6:" popovertarget=":R9r69kf6:" style="anchor-name:--popover-R9r69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/life-processes-part-1-nutrition-in-plants-and-animals/276428680"><span class="sr-only">Life processes - part 1 ( nutrition in plants and animals)</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:6" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Life processes - part 1 ( nutrition in plants and animals)" src="https://cdn.slidesharecdn.com/ss_thumbnails/atulritimaparth2-250308164228-6a17d5be-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Life processes - part 1 ( nutrition in plants and animals)" src="https://cdn.slidesharecdn.com/ss_thumbnails/atulritimaparth2-250308164228-6a17d5be-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Life processes - part 1 ( nutrition in plants and animals)</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Life processes - part 1 ( nutrition in plants and animals) for later" role="switch" aria-haspopup="dialog" aria-controls=":R2r9r69kf6:" popovertarget=":R2r9r69kf6:" style="anchor-name:--popover-R2r9r69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2r9r69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2r9r69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/MISSRITIMABIOLOGYEXP">MISSRITIMABIOLOGYEXP</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">These slides contain part 1 of chapter 1 of biology. </span></div></div><div class="" id=":R9r69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-R9r69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-7" aria-haspopup="dialog" aria-controls=":Ra369kf6:" popovertarget=":Ra369kf6:" style="anchor-name:--popover-Ra369kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/crossing-the-assault-course-seeing-the-pitfalls-before-you-fall-into-them-webinar-10-march-2025/276514354"><span class="sr-only">Crossing the assault course: Seeing the pitfalls before you fall into them we...</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:7" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="Crossing the assault course: Seeing the pitfalls before you fall into them we..." src="https://cdn.slidesharecdn.com/ss_thumbnails/crossingtheassaultcourseseeingthepitfallsbeforeyoufallintothemwebinar10march2025-250310175104-1aec079a-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="Crossing the assault course: Seeing the pitfalls before you fall into them we..." src="https://cdn.slidesharecdn.com/ss_thumbnails/crossingtheassaultcourseseeingthepitfallsbeforeyoufallintothemwebinar10march2025-250310175104-1aec079a-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">Crossing the assault course: Seeing the pitfalls before you fall into them we...</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save Crossing the assault course: Seeing the pitfalls before you fall into them we... for later" role="switch" aria-haspopup="dialog" aria-controls=":R2ra369kf6:" popovertarget=":R2ra369kf6:" style="anchor-name:--popover-R2ra369kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2ra369kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2ra369kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/assocpm">Association for Project Management </a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Crossing the assault course: Seeing the pitfalls before you fall into them webinar Monday 10 March 2025 APM Systems Thinking Interest Network Presenters: Andrew Wright, Amanda Whittaker, and Gareth David Content description: It’s easy to be wise after the event. If the APM’s target of all projects succeeding is to be met, we must all be a lot wiser before the event. Improving the identification of consequences i.e. the knock-on effects of making a choice, is essential to improving decision-making at all levels, from change control up to strategic implementation. Tragically, the NHS manager who filled a gap in the Health Visitor workforce by redeploying midwives failed to recognise that the shortage of midwives created would cost the lives of mothers and babies. Systems Dynamics and the use of Causal Loop Diagrams (CLDs) are a graphical tool for exploring both the scope and the dynamics of a problem and the solution so helping reveal unexpected consequences of projects, solutions and decisions. We have found them to be easy to use, quick and cheap to employ, so dramatically reducing the need to make the simplifying assumptions responsible for so many project failures. Stock and Flow models (SFMs) take CLDs into the world of simulation and can demonstrate the quantitative effects. Using CLDs is powerful in developing a consensus amongst diverse stakeholders due to effectiveness in facilitating collaborative working across different stakeholders, removing many of the barriers to a shared understanding of the situation to be addressed by the project/programme. We briefly describe CLDs and SFMs then illustrate their practical application by working through real yet apparently simple case study. In this webinar on Monday 10 March, we covered how CLDs and SFMs can be used generically in change impact assessment and risk identification for a project, illustrating it in a commercial sales context, as well as with the world-wide climate change issue.</span></div></div><div class="" id=":Ra369kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Ra369kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-8" aria-haspopup="dialog" aria-controls=":Rab69kf6:" popovertarget=":Rab69kf6:" style="anchor-name:--popover-Rab69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/how-to-hide-the-buttons-on-the-pos-screen-in-odoo-17/276538967"><span class="sr-only">How to hide the buttons on the POS screen in Odoo 17</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:8" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="How to hide the buttons on the POS screen in Odoo 17" src="https://cdn.slidesharecdn.com/ss_thumbnails/howtohidethebuttonsontheposscreeninodoo17-250311060657-320ccdff-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="How to hide the buttons on the POS screen in Odoo 17" src="https://cdn.slidesharecdn.com/ss_thumbnails/howtohidethebuttonsontheposscreeninodoo17-250311060657-320ccdff-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">How to hide the buttons on the POS screen in Odoo 17</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save How to hide the buttons on the POS screen in Odoo 17 for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rab69kf6:" popovertarget=":R2rab69kf6:" style="anchor-name:--popover-R2rab69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rab69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rab69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/CelineGeorge1">Celine George</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">The Point of Sale Product Screen in Odoo is a central interface that provides various functionalities through buttons such as Discount, Info, Refund, Reward, and others. Customising the visibility of these buttons based on user roles or permissions can enhance usability and security. </span></div></div><div class="" id=":Rab69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Rab69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-9" aria-haspopup="dialog" aria-controls=":Raj69kf6:" popovertarget=":Raj69kf6:" style="anchor-name:--popover-Raj69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/south-hornsey-the-lost-local-authority-that-merged-with-stoke-newington-by-tom-hilverkus/276462898"><span class="sr-only">South Hornsey: The Lost Local Authority that Merged with Stoke Newington by T...</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:9" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="South Hornsey: The Lost Local Authority that Merged with Stoke Newington by T..." src="https://cdn.slidesharecdn.com/ss_thumbnails/southhornseyfeb22-250309161321-b000f0cd-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="South Hornsey: The Lost Local Authority that Merged with Stoke Newington by T..." src="https://cdn.slidesharecdn.com/ss_thumbnails/southhornseyfeb22-250309161321-b000f0cd-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">South Hornsey: The Lost Local Authority that Merged with Stoke Newington by T...</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save South Hornsey: The Lost Local Authority that Merged with Stoke Newington by T... for later" role="switch" aria-haspopup="dialog" aria-controls=":R2raj69kf6:" popovertarget=":R2raj69kf6:" style="anchor-name:--popover-R2raj69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2raj69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2raj69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/HistoryofStokeNewing">History of Stoke Newington</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Presented at the 24th Stoke Newington History Talks event on 27th Feb 2025 https://stokenewingtonhistory.com/stoke-newington-history-talks/</span></div></div><div class="" id=":Raj69kf6:" popover="manual" data-popover-position="bottom-start" style="position-anchor:--popover-Raj69kf6"></div><div class="separator Separator_root__70Ime Separator_horizontal__czVEa" style="--color:var(--blue-gray-200);--size:1px" role="separator"></div><div class="RailCard_root__rZUGY RailCard_hasDescription__MjSgf SlideshowCard_root__pD8t4 slideshow-card" aria-describedby="latest-card-description-10" aria-haspopup="dialog" aria-controls=":Rar69kf6:" popovertarget=":Rar69kf6:" style="anchor-name:--popover-Rar69kf6"><a class="SlideshowCardLink_root__p8KI7" data-cy="slideshow-card-link" data-testid="slideshow-card-link" href="https://www.slideshare.net/slideshow/how-to-use-product-categories-in-odoo-17-to-organize-your-inventory/276539172"><span class="sr-only">How to use product categories in Odoo 17 to organize your Inventory</span></a><div class="slideshow-thumbnail Thumbnail_root__qLW0K SlideshowCard_thumb__86aJk" style="aspect-ratio:1.5;--index:10" data-testid="card-thumbnail"><img class="Thumbnail_thumb__UXO3a Thumbnail_blur__opK6A Thumbnail_cover__1zsIi" alt="How to use product categories in Odoo 17 to organize your Inventory" src="https://cdn.slidesharecdn.com/ss_thumbnails/howtouseproductcategoriesinodoo17toorganizeyourinventory-250311061259-404b5f8e-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/><img class="Thumbnail_thumb__UXO3a Thumbnail_contain__K6M0d" alt="How to use product categories in Odoo 17 to organize your Inventory" src="https://cdn.slidesharecdn.com/ss_thumbnails/howtouseproductcategoriesinodoo17toorganizeyourinventory-250311061259-404b5f8e-thumbnail.jpg?width=560&fit=bounds" loading="lazy"/></div><div class="SlideshowCard_content__xh7kV slideshow-card-content"><span class="slideshow-title SlideshowTitle_root__2VccW RailCard_title__Tvfiv ellipsis" style="-webkit-line-clamp:2" data-cy="slideshow-title">How to use product categories in Odoo 17 to organize your Inventory</span><button type="button" class="Button_root__i1yp0 Button_secondary__hHiHI Button_text__ZT_3O Button_small__sqsEx Button_icon__1C4qi save-slideshow-button SaveButton_root__b6zuu" data-testid="button" aria-checked="false" aria-label="Save How to use product categories in Odoo 17 to organize your Inventory for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rar69kf6:" popovertarget=":R2rar69kf6:" style="anchor-name:--popover-R2rar69kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rar69kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rar69kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/CelineGeorge1">Celine George</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">Product categories in Odoo are essential for organizing and managing your inventory efficiently. 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CHILDREN THROUGH THE STAGES OF DEVELOPMENTAL AND PARENTAL... for later" role="switch" aria-haspopup="dialog" aria-controls=":R2rc369kf6:" popovertarget=":R2rc369kf6:" style="anchor-name:--popover-R2rc369kf6"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/save.ef1812e2.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button><div class="Tooltip_root__7FS0Y" id=":R2rc369kf6:" popover="manual" data-popover-position="top" style="position-anchor:--popover-R2rc369kf6"></div><a class="SlideshowAuthor_root__IkT1_ RailCard_author__JYeYZ slideshow-author ellipsis" data-testid="slideshow-author" data-cy="slideshow-author" href="https://www.slideshare.net/pradeepabothu1">PRADEEP ABOTHU</a><div class="slideshow-stats SlideshowStats_root__EQOR1 RailCard_stats__ZvZms"> </div><span aria-hidden="true" class="seo-only">THE NEEDS OF NORMAL CHILDREN THROUGH THE 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class="sr-only"></span></span></button><button aria-label="Next" type="button" class="Slider_arrow__8LCca Slider_next__fa9IO"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/chevron-right.9b30ad08.svg);background-color:currentColor"></span><span class="sr-only"></span></span></button></div></div></div></div></div></div><div class="Transcript_root__Vrf6Q"><h2 class="Transcript_title__YgAka"><span class="icon Icon_root__AjZyv" style="--size:24px"><span class="Icon_icon__4zzsG" style="mask-image:url(https://public.slidesharecdn.com/_next/static/media/file.5db1ba24.svg);background-color:currentColor"></span><span class="sr-only"></span></span>Fabrication of Floating Gate MOS (FLOTOX)</h2><div><ul class="Transcript_list__faItj"><div><li>1. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#1">Fabrication of FLOTOX (EEPROM </a> Cell) Sudhanshu Janwadkar, Teaching Asst, SVNIT, Surat Lecture PPT: 24th Oct 2017 </li></div><div><li>2. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#2">Cross-Section View </a></li></div><div><li>3. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#3">• The fabrication </a> begins with the formation of an oxide layer on a silicon substrate • It is followed by the patterning of a photoresist mask • Ion implantation is carried out to form the buried n+ regions of the EEPROM memory cell. 1 PR = Photoresist </li></div><div><li>4. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#4">• After the </a> formation of the buried n+ regions, a tunnel window opening is etched in the oxide layer (utilizing a second photoresist mask). 2 Tunnelling Window </li></div><div><li>5. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#5">• A thin </a> layer of tunnel oxide , approximately 80 Å thick, is then grown in the tunnel window 3 </li></div><div><li>6. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#6">• Following the </a> growth of the tunnel oxide, a first layer of polysilicon is deposited and doped to a desired conductivity. 4 Floating Gate (Poly) </li></div><div><li>7. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#7">• This is </a> followed by formation of an oxide/nitride/oxide (ONO) layer over the first polysilicon layer. 5 </li></div><div><li>8. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#8">• The ONO </a> and underlying first polysilicon layer are then masked and etched to define the polysilicon floating gate of the memory cell with an overlying ONO layer. • Reoxidation and etchback results in the formation of oxide sidewall spacers on the edges of the floating gate and ONO. 6 </li></div><div><li>9. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#9">• A second </a> layer of polysilicon is then deposited and doped to a desired concentration and then etched to define a control gate of the memory cell and the gate of the access transistor of the FLOTOX cell 7 </li></div><div><li>10. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#10">• An N+ </a> source/drain implant is then performed to the source/drain regions of the access transistor 8 </li></div><div><li>11. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#11">• Finally, a </a> layer of dielectric material is formed and planarized and then etched to form a contact opening to the N+ drain/bit line. This is followed by formation of a metal bit line structure, resulting in the FLOTOX cell shown 9 DIELECTRIC </li></div><div><li>12. <a class="Transcript_link__MLbGS" href="https://www.slideshare.net/slideshow/fabrication-of-floating-gate-mos-flotox/81160880#12">References • Patent US </a> 5856222 A </li></div></ul></div></div><dialog class="Modal_root__TYkzh FullscreenModal_root__efM9m" id=":R2kf6:"><div class="Modal_wrapper__4UTGq"><div class="modal-content Modal_content__R1F4d FullscreenModal_content__bQ6mt"></div></div></dialog><div class="ad textads banner-ads banner_ads ad-unit ad-zone ad-space adsbox ads prebid" style="position:absolute;height:1px"></div><footer class="Footer_footer__N3WmV"><div class="Footer_top__y0vfl" data-testid="footer-top"><div class="Footer_links__F2xFZ"><a class="Link_root__vn3ab Link_light__mcUPh Link_size-medium__ZLo12 Link_weight-bold__me4nt" style="order:0" href="/about">About</a><a class="Link_root__vn3ab Link_light__mcUPh Link_size-medium__ZLo12 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18:24:52 UTC","description":"Floating Gate Devices are widely used in ROM based memories. In EEPROM, one such Floating gate MOS device FLOTOX is used. FLOTOX(Floating Gate Tunneling Oxide MOS) works on FN tunneling phenomenon. This presentation discusses the method for fabrication of such FLOTOX device(actually a EEPROM cell). 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This is followed by formation of a metal\nbit line structure, resulting in the FLOTOX\ncell shown\n9\nDIELECTRIC\n ","References\n• Patent US 5856222 A\n "],"twitterShareUrl":"https://twitter.com/intent/tweet?via=SlideShare\u0026text=Fabrication+of+Floating+Gate+MOS+%28FLOTOX%29+%23analogvlsi+%23analogvlsidesign+https%3A%2F%2Fwww.slideshare.net%2Fslideshow%2Ffabrication-of-floating-gate-mos-flotox%2F81160880","type":"presentation","viewStats":{"views":2877,"viewsFromEmbeds":26,"topEmbeds":[]},"recommendationsByLocation":{"rightRail":[{"algorithmId":"5","displayTitle":"VLSI Design(Fabrication)","isSavedByCurrentUser":false,"pageCount":44,"score":0.634467,"slideshowId":"49132602","sourceName":"cm_interact","strippedTitle":"vlsi-designfabrication","thumbnail":"https://cdn.slidesharecdn.com/ss_thumbnails/vlsi2-150608165741-lva1-app6891-thumbnail.jpg?width=600\u0026height=600\u0026fit=bounds","description":"this ppt provides fabrication on SI wafer, CMOS fabrication process, basic CMOS inverter, future, application, advantage, disadvantage etc.","tags":[],"url":"https://www.slideshare.net/slideshow/vlsi-designfabrication/49132602","userLogin":"TrijitMallick","userName":"Trijit Mallick","viewCount":4873},{"algorithmId":"5","displayTitle":"Double patterning for 32nm and beyond","isSavedByCurrentUser":false,"pageCount":10,"score":0.632463,"slideshowId":"30955526","sourceName":"cm_interact","strippedTitle":"double-patterning-for-32nm-and-beyond","thumbnail":"https://cdn.slidesharecdn.com/ss_thumbnails/presentationdp-140207121538-phpapp01-thumbnail.jpg?width=600\u0026height=600\u0026fit=bounds","description":"Multiple patterning is a class of technologies for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. 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It begins by defining CMOS technology and its use of complementary nMOS and pMOS transistors. It then outlines the major steps in the CMOS fabrication process, including lithography to pattern transistors and wires on the silicon wafer. Key steps include oxidation, photolithography, etching, doping via diffusion or implantation, and metallization. The document notes current problems with optical lithography limitations and materials issues. It concludes by discussing potential future changes like new materials, SOI, finFETs, and other design modifications.","tags":[],"url":"https://www.slideshare.net/slideshow/cmos-fabrication/67049411","userLogin":"jigyashamaru","userName":"jigyashamaru","viewCount":33276},{"algorithmId":"5","displayTitle":"Cmos fabrication process","isSavedByCurrentUser":false,"pageCount":15,"score":0.598343,"slideshowId":"124580577","sourceName":"cm_interact","strippedTitle":"cmos-fabrication-process-124580577","thumbnail":"https://cdn.slidesharecdn.com/ss_thumbnails/cmosfabricationprocess-181201151948-thumbnail.jpg?width=600\u0026height=600\u0026fit=bounds","description":"The CMOS fabrication process in VLSI.\r\nCMOS (complementary metal-oxide-semiconductor) is the term usually used to describe the small amount of memory on a computer motherboard that stores the BIOS settings.","tags":["n-well cmos fabrication","cellular mobile communication lectures","vlsi lectures"],"url":"https://www.slideshare.net/slideshow/cmos-fabrication-process-124580577/124580577","userLogin":"AnandaMohan4","userName":"Ananda Mohan","viewCount":3716},{"algorithmId":"5","displayTitle":"CMOS Fabrication using P-well -VLSI","isSavedByCurrentUser":false,"pageCount":9,"score":0.596764,"slideshowId":"249394222","sourceName":"cm_interact","strippedTitle":"cmos-fabrication-using-pwell-vlsi","thumbnail":"https://cdn.slidesharecdn.com/ss_thumbnails/cmos-210617081709-thumbnail.jpg?width=600\u0026height=600\u0026fit=bounds","description":"CMOS FABRICATION\u000b\r\nFor less power dissipation requirement CMOS technology is used for implementing transistors. If we require a faster circuit then transistors are implemented over IC using BJT . Fabrication of CMOS transistors as IC’s can be done in three different methods.\r\nThe N-well / P-well technology, where n-type diffusion is done over a p-type substrate or p-type diffusion is done over n-type substrate respectively.\r\nP-WELL PROCESS \r\nThe fabrication steps of p well process are same as that of an n-well process except that instead of n-well a p-well is implanted . The process steps involved in p-well process are shown in Figure below. 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S. M. Jannatul Islam","viewCount":8590},{"algorithmId":"5","displayTitle":"WPE","isSavedByCurrentUser":false,"pageCount":2,"score":0.558828,"slideshowId":"912927","sourceName":"cm_interact","strippedTitle":"WPE","thumbnail":"https://cdn.slidesharecdn.com/ss_thumbnails/WPE-123184826661-phpapp02-thumbnail.jpg?width=600\u0026height=600\u0026fit=bounds","description":"The document discusses the Well Proximity Effect (WPE) where transistors located near the edge of a well will have different thresholds and currents compared to those located remotely from the edge. The WPE effect occurs for all types of MOS transistors including standard, high, low, and thick/thin oxide devices. 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