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class="vector-toc-numb">4</span> <span>Processors</span> </div> </a> <button aria-controls="toc-Processors-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Processors subsection</span> </button> <ul id="toc-Processors-sublist" class="vector-toc-list"> <li id="toc-Desktop" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Desktop"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.1</span> <span>Desktop</span> </div> </a> <ul id="toc-Desktop-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Server" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Server"> <div class="vector-toc-text"> <span class="vector-toc-numb">4.2</span> <span>Server</span> </div> </a> <ul id="toc-Server-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-False_advertising_lawsuit" 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class="vector-toc-link" href="#Performance_on_Linux"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.1</span> <span>Performance on Linux</span> </div> </a> <ul id="toc-Performance_on_Linux-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Performance_on_Windows" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Performance_on_Windows"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.2</span> <span>Performance on Windows</span> </div> </a> <ul id="toc-Performance_on_Windows-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Overclocking" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Overclocking"> <div class="vector-toc-text"> <span class="vector-toc-numb">6.3</span> <span>Overclocking</span> </div> </a> <ul id="toc-Overclocking-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Revisions" class="vector-toc-list-item vector-toc-level-1 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Available in 19 languages" > <label id="p-lang-btn-label" for="p-lang-btn-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled cdx-button--weight-quiet cdx-button--action-progressive mw-portlet-lang-heading-19" aria-hidden="true" ><span class="vector-icon mw-ui-icon-language-progressive mw-ui-icon-wikimedia-language-progressive"></span> <span class="vector-dropdown-label-text">19 languages</span> </label> <div class="vector-dropdown-content"> <div class="vector-menu-content"> <ul class="vector-menu-content-list"> <li class="interlanguage-link interwiki-ar mw-list-item"><a href="https://ar.wikipedia.org/wiki/%D9%85%D8%B9%D8%A7%D9%84%D8%AC%D8%A9_%D8%B9%D9%86%D9%82%D9%88%D8%AF%D9%8A%D8%A9_%D9%85%D8%AA%D8%B9%D8%AF%D8%AF%D8%A9_%D8%A7%D9%84%D9%86%D9%8A%D8%A7%D8%B3%D8%A8" title="معالجة عنقودية متعددة النياسب – Arabic" lang="ar" hreflang="ar" data-title="معالجة عنقودية متعددة النياسب" data-language-autonym="العربية" data-language-local-name="Arabic" class="interlanguage-link-target"><span>العربية</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Catalan" lang="ca" hreflang="ca" data-title="AMD Bulldozer" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Czech" lang="cs" hreflang="cs" data-title="AMD Bulldozer" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-de mw-list-item"><a href="https://de.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – German" lang="de" hreflang="de" data-title="AMD Bulldozer" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Estonian" lang="et" hreflang="et" data-title="AMD Bulldozer" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/Bulldozer_(microarquitectura)" title="Bulldozer (microarquitectura) – Spanish" lang="es" hreflang="es" data-title="Bulldozer (microarquitectura)" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Bulldozer_(microarchitecture)" title="Bulldozer (microarchitecture) – French" lang="fr" hreflang="fr" data-title="Bulldozer (microarchitecture)" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/%EB%B6%88%EB%8F%84%EC%A0%80_(%EB%A7%88%EC%9D%B4%ED%81%AC%EB%A1%9C%EC%95%84%ED%82%A4%ED%85%8D%EC%B2%98)" title="불도저 (마이크로아키텍처) – Korean" lang="ko" hreflang="ko" data-title="불도저 (마이크로아키텍처)" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/Bulldozer_(microarchitettura)" title="Bulldozer (microarchitettura) – Italian" lang="it" hreflang="it" data-title="Bulldozer (microarchitettura)" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/Bulldozer_(mikroarchitekt%C3%BAra)" title="Bulldozer (mikroarchitektúra) – Hungarian" lang="hu" hreflang="hu" data-title="Bulldozer (mikroarchitektúra)" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Dutch" lang="nl" hreflang="nl" data-title="AMD Bulldozer" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Bulldozer_(%E3%83%9E%E3%82%A4%E3%82%AF%E3%83%AD%E3%82%A2%E3%83%BC%E3%82%AD%E3%83%86%E3%82%AF%E3%83%81%E3%83%A3)" title="Bulldozer (マイクロアーキテクチャ) – Japanese" lang="ja" hreflang="ja" data-title="Bulldozer (マイクロアーキテクチャ)" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="AMD Bulldozer" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/Bulldozer_(Microarquitetura)" title="Bulldozer (Microarquitetura) – Portuguese" lang="pt" hreflang="pt" data-title="Bulldozer (Microarquitetura)" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/Bulldozer_(%D0%BC%D0%B8%D0%BA%D1%80%D0%BE%D0%B0%D1%80%D1%85%D0%B8%D1%82%D0%B5%D0%BA%D1%82%D1%83%D1%80%D0%B0)" title="Bulldozer (микроархитектура) – Russian" lang="ru" hreflang="ru" data-title="Bulldozer (микроархитектура)" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Slovak" lang="sk" hreflang="sk" data-title="AMD Bulldozer" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/AMD_Bulldozer" title="AMD Bulldozer – Finnish" lang="fi" hreflang="fi" data-title="AMD Bulldozer" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-sv mw-list-item"><a href="https://sv.wikipedia.org/wiki/Bulldozer_(mikroarkitektur)" title="Bulldozer (mikroarkitektur) – Swedish" lang="sv" hreflang="sv" data-title="Bulldozer (mikroarkitektur)" data-language-autonym="Svenska" data-language-local-name="Swedish" class="interlanguage-link-target"><span>Svenska</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/%E6%8E%A8%E5%9C%9F%E6%A9%9F%E5%BE%AE%E6%9E%B6%E6%A7%8B" title="推土機微架構 – Chinese" lang="zh" hreflang="zh" data-title="推土機微架構" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a href="https://www.wikidata.org/wiki/Special:EntityPage/Q294924#sitelinks-wikipedia" title="Edit interlanguage links" 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id="mw-content-subtitle"></div></div> <div id="mw-content-text" class="mw-body-content"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Microarchitecture by AMD</div> <p class="mw-empty-elt"> </p> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title">Bulldozer - Family 15h</caption><tbody><tr><th colspan="2" class="infobox-header">General information</th></tr><tr><th scope="row" class="infobox-label">Launched</th><td class="infobox-data">October 12, 2011<span class="noprint">; 13 years ago</span><span style="display:none"> (<span class="bday dtstart published updated">October 12, 2011</span>)</span></td></tr><tr><th scope="row" class="infobox-label">Common manufacturer</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li><a href="/wiki/AMD" title="AMD">AMD</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Architecture and classification</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Technology_node" class="mw-redirect" title="Technology node">Technology node</a></th><td class="infobox-data">32 nm</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set</a></th><td class="infobox-data"><a href="/wiki/X86-64#Microarchitecture_levels" title="X86-64">x86-64-v2</a></td></tr><tr><th colspan="2" class="infobox-header">Physical specifications</th></tr><tr><th scope="row" class="infobox-label">Socket</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/Socket_AM3%2B" title="Socket AM3+">Socket AM3+</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Products, models, variants</th></tr><tr><th scope="row" class="infobox-label">Core names</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/FX-4100" class="mw-redirect" title="FX-4100">AMD FX</a></li><li><a href="/wiki/Opteron#Opteron_(32_nm_SOI)_–_First_Generation_Bulldozer_Microarchitecture" title="Opteron">Opteron</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">History</th></tr><tr><th scope="row" class="infobox-label">Predecessor</th><td class="infobox-data"><a href="/wiki/AMD_10h" title="AMD 10h">Family 10h (K10)</a></td></tr><tr><th scope="row" class="infobox-label">Successor</th><td class="infobox-data"><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver - Family 15h (2nd-gen)</a></td></tr></tbody></table> <p>The <b>AMD Bulldozer Family 15h</b> is a <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a> <a href="/wiki/Microarchitecture" title="Microarchitecture">microarchitecture</a> for the <a href="/wiki/AMD_FX" title="AMD FX">FX</a> and <a href="/wiki/Opteron" title="Opteron">Opteron</a> line of processors, developed by <a href="/wiki/Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a> for the desktop and server markets.<sup id="cite_ref-amd1_1-0" class="reference"><a href="#cite_note-amd1-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-engadget1_2-0" class="reference"><a href="#cite_note-engadget1-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> Bulldozer is the <a href="/wiki/Codename" class="mw-redirect" title="Codename">codename</a> for this family of microarchitectures. It was released on October 12, 2011, as the successor to the <a href="/wiki/AMD_10h" title="AMD 10h">K10</a> microarchitecture. </p><p>Bulldozer is designed from scratch, not a development of earlier processors.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> The core is specifically aimed at computing products with <a href="/wiki/Thermal_Design_Power" class="mw-redirect" title="Thermal Design Power">TDPs</a> of 10 to 125 <a href="/wiki/Watt" title="Watt">watts</a>. AMD claims dramatic performance-per-watt efficiency improvements in <a href="/wiki/High-performance_computing" title="High-performance computing">high-performance computing</a> (HPC) applications with Bulldozer cores. </p><p>The <i>Bulldozer</i> cores support most of the instruction sets implemented by <a href="/wiki/Intel" title="Intel">Intel</a> processors (<a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a>) available at its introduction (including <a href="/wiki/SSSE3" title="SSSE3">SSSE3</a>, <a href="/wiki/SSE4.1" class="mw-redirect" title="SSE4.1">SSE4.1</a>, <a href="/wiki/SSE4.2" class="mw-redirect" title="SSE4.2">SSE4.2</a>, <a href="/wiki/AES_instruction_set" title="AES instruction set">AES</a>, <a href="/wiki/CLMUL_instruction_set" title="CLMUL instruction set">CLMUL</a>, and <a href="/wiki/Advanced_Vector_Extensions" title="Advanced Vector Extensions">AVX</a>) as well as new instruction sets proposed by AMD; <a href="/wiki/Bit_Manipulation_Instruction_Sets" class="mw-redirect" title="Bit Manipulation Instruction Sets">ABM</a>, <a href="/wiki/XOP_instruction_set" title="XOP instruction set">XOP</a>, <a href="/wiki/FMA4_instruction_set" class="mw-redirect" title="FMA4 instruction set">FMA4</a> and <a href="/wiki/F16C" title="F16C">F16C</a>.<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> Only Bulldozer GEN4 (<a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a>) supports <a href="/wiki/AVX2" class="mw-redirect" title="AVX2">AVX2</a> instruction sets. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Overview">Overview</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=1" title="Edit section: Overview"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>According to AMD, Bulldozer-based CPUs are based on <a href="/wiki/GlobalFoundries" title="GlobalFoundries">GlobalFoundries</a>' 32 nm <a href="/wiki/Silicon_on_insulator" title="Silicon on insulator">Silicon on insulator (SOI)</a> process technology and reuses the approach of <a href="/wiki/Digital_Equipment_Corporation" title="Digital Equipment Corporation">DEC</a> for multitasking computer performance with the arguments that it, according to press notes, "balances dedicated and shared computer resources to provide a highly compact, high units count design that is easily replicated on a chip for performance scaling."<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> In other words, by eliminating some of the "redundant" elements that naturally creep into multicore designs, AMD has hoped to take better advantage of its hardware capabilities, while using less power. </p><p>Bulldozer-based implementations built on <a href="/wiki/32_nanometer" class="mw-redirect" title="32 nanometer">32nm</a> SOI with <a href="/wiki/High-k_dielectric" class="mw-redirect" title="High-k dielectric">HKMG</a> arrived in October 2011 for both servers and desktops. The server segment included the dual chip (16-core) <a href="/wiki/Opteron" title="Opteron">Opteron</a> processor codenamed <i>Interlagos</i> (for <a href="/wiki/Socket_G34" title="Socket G34">Socket G34</a>) and single chip (4, 6 or 8 cores) <i>Valencia</i> (for <a href="/wiki/Socket_C32" title="Socket C32">Socket C32</a>), while the <i>Zambezi</i> (4, 6 and 8 cores) targeted desktops on <a href="/wiki/Socket_AM3%2B" title="Socket AM3+">Socket AM3+</a>.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> </p><p>Bulldozer is the first major redesign of AMD’s processor architecture since 2003, when the firm launched its K8 processors, and also features two 128-bit <a href="/wiki/Fused_multiply%E2%80%93add" class="mw-redirect" title="Fused multiply–add">FMA</a>-capable <a href="/wiki/Floating-point_unit" title="Floating-point unit">FPUs</a> which can be combined into one 256-bit FPU. This design is accompanied by two integer clusters, each with 4 pipelines (the fetch/decode stage is shared). Bulldozer also introduced shared L2 cache in the new architecture. AMD calls this <i>design</i> a "Module". A 16-core processor design would feature eight of these "modules",<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> but the operating system will recognize each "module" as two logical cores. </p><p>The modular architecture consists of multithreaded shared L2 cache and FlexFPU, which uses <a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">simultaneous multithreading</a>. Each physical integer core, two per module, is single threaded, in contrast with Intel's <a href="/wiki/Hyperthreading" class="mw-redirect" title="Hyperthreading">Hyperthreading</a>, where two virtual simultaneous threads share the resources of a single physical core.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> </p><p>In a retrospective review, Jeremy Laird of <a href="/wiki/APC_(magazine)" title="APC (magazine)">APC</a> magazine commented on Bulldozer issues, noted that it was slower than outgoing Phenom II K10 design, and that the PC software ecosystem had not yet "embraced" the multi-threaded model. By his observation, issues caused a big loss for AMD, that the company lost over 1 billion <a href="/wiki/United_States_dollar" title="United States dollar">USD</a> in 2012, and that some industry observers were predicting the bankruptcy by mid-2015. The company later managed to return to profit. Mentioned reasons for regaining the profitability were the earlier <a href="/wiki/Divestment" title="Divestment">divesting</a> of in-house manufacturing into <a href="/wiki/GlobalFoundries" title="GlobalFoundries">GlobalFoundries</a> and then outsourcing the manufacturing to <a href="/wiki/TSMC" title="TSMC">TSMC</a> and making a new <a href="/wiki/Ryzen" title="Ryzen">Ryzen</a> CPU design.<sup id="cite_ref-:0_12-0" class="reference"><a href="#cite_note-:0-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Architecture">Architecture</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=2" title="Edit section: Architecture"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Bulldozer_core"><span class="anchor" id="CIC"></span><span class="anchor" id="CMT"></span>Bulldozer core</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=3" title="Edit section: Bulldozer core"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:AMD_Bulldozer_block_diagram_(CPU_core_block).png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/b0/AMD_Bulldozer_block_diagram_%28CPU_core_block%29.png/300px-AMD_Bulldozer_block_diagram_%28CPU_core_block%29.png" decoding="async" width="300" height="307" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/b0/AMD_Bulldozer_block_diagram_%28CPU_core_block%29.png/450px-AMD_Bulldozer_block_diagram_%28CPU_core_block%29.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/b0/AMD_Bulldozer_block_diagram_%28CPU_core_block%29.png/600px-AMD_Bulldozer_block_diagram_%28CPU_core_block%29.png 2x" data-file-width="840" data-file-height="860" /></a><figcaption>Block diagram of a complete Bulldozer module, showing <b>2 integer clusters</b></figcaption></figure> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:AMD_Bulldozer_block_diagram_(8_core_CPU).PNG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/e/ec/AMD_Bulldozer_block_diagram_%288_core_CPU%29.PNG/300px-AMD_Bulldozer_block_diagram_%288_core_CPU%29.PNG" decoding="async" width="300" height="247" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/e/ec/AMD_Bulldozer_block_diagram_%288_core_CPU%29.PNG/450px-AMD_Bulldozer_block_diagram_%288_core_CPU%29.PNG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/e/ec/AMD_Bulldozer_block_diagram_%288_core_CPU%29.PNG/600px-AMD_Bulldozer_block_diagram_%288_core_CPU%29.PNG 2x" data-file-width="1140" data-file-height="940" /></a><figcaption>Block diagram of a 4 module design with <b>8 integer clusters</b></figcaption></figure> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Hwloc.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/9/95/Hwloc.png/300px-Hwloc.png" decoding="async" width="300" height="139" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/9/95/Hwloc.png/450px-Hwloc.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/9/95/Hwloc.png/600px-Hwloc.png 2x" data-file-width="1450" data-file-height="670" /></a><figcaption>Memory topology of a Bulldozer server</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Bulldozer_640.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/35/Bulldozer_640.jpg/220px-Bulldozer_640.jpg" decoding="async" width="220" height="237" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/35/Bulldozer_640.jpg/330px-Bulldozer_640.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/35/Bulldozer_640.jpg/440px-Bulldozer_640.jpg 2x" data-file-width="644" data-file-height="695" /></a><figcaption>Bulldozer die shot with highlighted parts</figcaption></figure> <p>Bulldozer made use of "Clustered Multithreading" (CMT), a technique where some parts of the processor are shared between two threads and some parts are unique for each thread. Prior examples of such an approach to unconventional <a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">multithreading</a> can be traced way back to the 2005 <a href="/wiki/UltraSPARC_T1" title="UltraSPARC T1">Sun Microsystems' UltraSPARC T1</a> CPU. In terms of hardware complexity and functionality, a Bulldozer CMT module is equal to a dual-core processor in its integer calculation capabilities, and to either a single-core processor or a handicapped dual-core in terms of floating-point computational power, depending on whether the code is saturated in floating point instructions in both threads running on the same CMT module, and whether the FPU is performing 128-bit or 256-bit floating point operations. The reason for this is that for each two integer cores, that is, within the same module, there is a single floating-point unit consisting of a pair of 128-bit <a href="/wiki/FMAC" class="mw-redirect" title="FMAC">FMAC</a> <a href="/wiki/Execution_unit" title="Execution unit">execution units</a>. </p><p>CMT is in some way a simpler but similar design philosophy to <a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">SMT</a>; both designs try to utilize execution units efficiently; in either method, when two threads compete for some execution pipelines, there is a loss in performance in one or more of the threads. Due to dedicated integer cores, the Bulldozer family modules performed roughly like a dual-core, dual-threaded processor during sections of code that were either wholly integer or a mix of integer and floating-point calculations; yet, due to the SMT use of the shared floating-point pipelines, the module would perform similarly to a single-core, dual-threaded SMT processor (SMT2) for a pair of threads saturated with floating-point instructions. (Both of these last two comparisons make the assumption that the processor possesses an equally wide and capable execution core, integer-wise and floating-point-wise, respectively.) </p><p>Both CMT and SMT are at peak effectiveness while running integer and floating point code on a pair of threads. CMT stays at peak effectiveness while working on a pair of threads consisting both of integer code, while under SMT, one or both threads will underperform due to competition for integer execution units. The disadvantage for CMT is a greater number of idle integer execution units in a single threaded case. In the single threaded case, CMT is limited to use at most half of the integer execution units in its module, while SMT imposes no such limit. A large SMT core with integer circuitry as wide and fast as two CMT cores could in theory have momentarily up to twice an integer performance in a single thread case. (More realistically for general code as a whole, <a href="/wiki/Pollack%27s_Rule" class="mw-redirect" title="Pollack's Rule">Pollack's Rule</a> estimates a speedup factor of <span class="mwe-math-element"><span class="mwe-math-mathml-inline mwe-math-mathml-a11y" style="display: none;"><math xmlns="http://www.w3.org/1998/Math/MathML" alttext="{\displaystyle {\sqrt {2}}}"> <semantics> <mrow class="MJX-TeXAtom-ORD"> <mstyle displaystyle="true" scriptlevel="0"> <mrow class="MJX-TeXAtom-ORD"> <msqrt> <mn>2</mn> </msqrt> </mrow> </mstyle> </mrow> <annotation encoding="application/x-tex">{\displaystyle {\sqrt {2}}}</annotation> </semantics> </math></span><img src="https://wikimedia.org/api/rest_v1/media/math/render/svg/b4afc1e27d418021bf10898eb44a7f5f315735ff" class="mwe-math-fallback-image-inline mw-invert skin-invert" aria-hidden="true" style="vertical-align: -0.671ex; width:3.098ex; height:3.009ex;" alt="{\displaystyle {\sqrt {2}}}"></span>, or approximately 40% increase in performance.) </p><p>CMT processors and a typical SMT processor are similar in their efficient shared use of the L2 cache between a pair of threads. </p> <ul><li>A module consists of a coupling of two "conventional" x86 out of order processing cores. The processing core shares the early pipeline stages (e.g. <a href="/wiki/CPU_cache" title="CPU cache">L1i</a>, fetch, decode), the FPUs, and the L2 cache with the rest of the module. <ul><li>Each module has the following independent hardware resources:<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup></li> <li>16 KB 4-way of L1d (way-predicted) per core and 2-way 64 KB of L1i per module, one way for each of the two cores<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup></li> <li>2 MB of L2 cache per module (shared between the two integer cores)</li> <li>Write Coalescing Cache<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> is a special cache that is part of L2 cache in Bulldozer microarchitecture. Stores from both L1D caches in the module go through the WCC, where they are buffered and coalesced. The WCC's task is reducing number of writes to the L2 cache.</li> <li>Two dedicated integer cores <ul><li>– <i>each one includes two <a href="/wiki/Arithmetic_logic_unit" title="Arithmetic logic unit">ALU</a> and two <a href="/wiki/Address_generation_unit" title="Address generation unit">AGU</a> which are capable of a total of four independent arithmetic and memory operations per clock and per core</i></li> <li>– <i>duplicating integer schedulers and execution pipelines offers dedicated hardware to each of two threads which double performance for multi-threaded integer loads</i></li> <li>– <i>the second integer core in the module increases the Bulldozer module die by around 12%, which at chip level adds about 5% of total die space</i><sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup></li></ul></li> <li>Two symmetrical 128-bit FMAC (<a href="/wiki/Fused_multiply%E2%80%93add" class="mw-redirect" title="Fused multiply–add">fused multiply–add</a> capability) floating-point pipelines per module that can be unified into one large 256-bit-wide unit if one of the integer cores dispatches AVX instruction and two symmetrical x87/MMX/SSE capable FPPs for backward compatibility with SSE2 non-optimized software. Each FMAC unit is also capable of division and square root operations with variable latency.</li></ul></li> <li>All modules present share the L3 cache as well as an Advanced Dual-Channel Memory Sub-System (IMC – Integrated Memory Controller).</li> <li>A module has 213 million transistors in an area of 30.9 mm² (including the 2 MB shared L2 cache) on an Orochi die.<sup id="cite_ref-ISSCC_2011_20-0" class="reference"><a href="#cite_note-ISSCC_2011-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup></li> <li>The pipeline depth of Bulldozer (as well as Piledriver and Steamroller) is 20 cycles, compared to 12 cycles of the K10 core predecessor.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup></li></ul> <p>The longer pipeline allowed the Bulldozer family of processors to achieve a much higher clock frequency compared to its K10 predecessors. While this increased frequencies and throughput, the longer pipeline also increased latencies and increased <a href="/wiki/Branch_misprediction" class="mw-redirect" title="Branch misprediction">branch misprediction</a> penalties. </p> <ul><li>The width of the Bulldozer integer core, four (2 ALU, 2 AGU), is somewhat less than the width of the K10 core, six (3 ALU, 3 AGU). Bobcat and Jaguar also used a four wide integer core, yet with lighter execution units: 1 ALU, 1 simple ALU, 1 load AGU, 1 store AGU.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup></li></ul> <p>The issue widths (and peak instruction executions per cycle) of a Jaguar, K10, and Bulldozer core are 2, 3, and 4 respectively. This made Bulldozer a more superscalar design compared to Jaguar/Bobcat. However, due to K10's somewhat wider core (in addition to the lack of refinements and optimizations in a first generation design) the Bulldozer architecture typically performed with somewhat <a href="/wiki/Instructions_per_cycle" title="Instructions per cycle">lower IPC</a> compared to its K10 predecessors. It was not until the refinements made in Piledriver and Steamroller, that the IPC of the Bulldozer family distinctly began to exceed that of K10 processors such as Phenom II. </p> <div class="mw-heading mw-heading3"><h3 id="Branch_predictor"><a href="/wiki/Branch_predictor" title="Branch predictor">Branch predictor</a></h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=4" title="Edit section: Branch predictor"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Two-level Branch Target Buffer(BTB)<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup></li> <li>Hybrid predictor for conditionals</li> <li>Indirect predictor</li></ul> <div class="mw-heading mw-heading3"><h3 id="Instruction_set_extensions">Instruction set extensions</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=5" title="Edit section: Instruction set extensions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Support for Intel's Advanced Vector Extensions (<a href="/wiki/Advanced_Vector_Extensions" title="Advanced Vector Extensions">AVX</a>) instruction set, which supports 256-Bit floating point operations, and <a href="/wiki/SSE4.1" class="mw-redirect" title="SSE4.1">SSE4.1</a>, <a href="/wiki/SSE4.2" class="mw-redirect" title="SSE4.2">SSE4.2</a>, <a href="/wiki/AES_instruction_set" title="AES instruction set">AES</a>, <a href="/wiki/CLMUL_instruction_set" title="CLMUL instruction set">CLMUL</a>, as well as future 128-bit instruction sets proposed by AMD (<a href="/wiki/XOP_instruction_set" title="XOP instruction set">XOP</a>, <a href="/wiki/FMA4_instruction_set#FMA4_instruction_set" class="mw-redirect" title="FMA4 instruction set">FMA4</a>, and <a href="/wiki/F16C" title="F16C">F16C</a>),<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> which have the same functionality as the <a href="/wiki/SSE5" title="SSE5">SSE5</a> instruction set formerly proposed by AMD, but with compatibility to the <a href="/wiki/Advanced_Vector_Extensions" title="Advanced Vector Extensions">AVX</a> coding scheme.</li> <li>Bulldozer GEN4 (<a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a>) supports <a href="/wiki/AVX2" class="mw-redirect" title="AVX2">AVX2</a> instruction sets.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Process_technology_and_clock_frequency">Process technology and clock frequency</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=6" title="Edit section: Process technology and clock frequency"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>11-metal layer 32 nm SOI process with implemented first generation <a href="/wiki/GlobalFoundries" title="GlobalFoundries">GlobalFoundries</a>'s <a href="/wiki/High-K_Metal_Gate" class="mw-redirect" title="High-K Metal Gate">High-K Metal Gate</a> (HKMG)</li> <li><i>Turbo Core 2</i> performance boost to increase clock frequency up to 500 MHz with all threads active (for most workloads) and up to 1 GHz with the half of the thread active, within the TDP limit.<sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup></li> <li>The chip operates at 0.775 to 1.425 V, achieving clock frequencies of 3.6 GHz or more<sup id="cite_ref-ISSCC_2011_20-1" class="reference"><a href="#cite_note-ISSCC_2011-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup></li> <li>Min-Max TDP: 25 – 140 watts</li></ul> <div class="mw-heading mw-heading3"><h3 id="Cache_and_memory_interface">Cache and memory interface</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=7" title="Edit section: Cache and memory interface"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li>Up to 8 MB of L3 shared among all cores on the same silicon die (8 MB for 4 cores in Desktop segment and 16 MB for 8 cores in the Server segment), divided into four subcaches of 2 MB each, capable of operating at 2.2 GHz at 1.1125 V<sup id="cite_ref-ISSCC_2011_20-2" class="reference"><a href="#cite_note-ISSCC_2011-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup></li> <li>Native <a href="/wiki/Ddr3" class="mw-redirect" title="Ddr3">DDR3</a> memory support up to DDR3-1866<sup id="cite_ref-AMD_Roadmap_26-0" class="reference"><a href="#cite_note-AMD_Roadmap-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup></li> <li>Dual Channel DDR3 integrated memory controller for Desktop and Server/Workstation Opteron 42xx "Valencia";<sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup> Quad Channel DDR3 Integrated Memory Controller<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup> for Server/Workstation Opteron 62xx "Interlagos"</li> <li>AMD claims support for two DIMMs of DDR3-1600 per channel. Two DIMMs of DDR3-1866 on a single channel will be down-clocked to 1600.</li></ul> <div class="mw-heading mw-heading3"><h3 id="I/O_and_socket_interface"><span id="I.2FO_and_socket_interface"></span>I/O and socket interface</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=8" title="Edit section: I/O and socket interface"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/HyperTransport" title="HyperTransport">HyperTransport</a> Technology rev. 3.1 (<i>3.20 GHz, 6.4 GT/s, 25.6 GB/s & 16-bit wide link</i>) [first implemented into HY-D1 revision <a href="/wiki/List_of_AMD_Opteron_microprocessors#Opteron_6100-series_"Magny-Cours"_(45_nm)" class="mw-redirect" title="List of AMD Opteron microprocessors">"Magny-Cours"</a> on the socket G34 Opteron platform in March 2010 and <a href="/wiki/List_of_AMD_Opteron_microprocessors#Opteron_4100-series_"Lisbon"_(45_nm)_2" class="mw-redirect" title="List of AMD Opteron microprocessors">"Lisbon"</a> on the socket C32 Opteron platform in June 2010]</li> <li><a href="/wiki/Socket_AM3%2B" title="Socket AM3+">Socket AM3+</a> (<i>AM3r2</i>) <ul><li>942-pin, <a href="/wiki/DDR3_SDRAM" title="DDR3 SDRAM">DDR3</a> support only</li> <li>Will retain backward compatibility with Socket AM3 motherboards (as per motherboard manufacturer choice and if BIOS updates are provided<sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup>), however this not officially supported by AMD; AM3+ motherboards will be backward-compatible with AM3 processors.<sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup></li></ul></li> <li>For the server segment, the existing <a href="/wiki/Socket_G34" title="Socket G34">socket G34</a> (LGA1974) and <a href="/wiki/Socket_C32" title="Socket C32">socket C32</a> (LGA1207) will be used.</li></ul> <div class="mw-heading mw-heading2"><h2 id="Features">Features</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=9" title="Edit section: Features"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1251242444">.mw-parser-output .ambox{border:1px solid #a2a9b1;border-left:10px solid #36c;background-color:#fbfbfb;box-sizing:border-box}.mw-parser-output .ambox+link+.ambox,.mw-parser-output .ambox+link+style+.ambox,.mw-parser-output .ambox+link+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+style+.ambox,.mw-parser-output .ambox+.mw-empty-elt+link+link+.ambox{margin-top:-1px}html body.mediawiki .mw-parser-output .ambox.mbox-small-left{margin:4px 1em 4px 0;overflow:hidden;width:238px;border-collapse:collapse;font-size:88%;line-height:1.25em}.mw-parser-output .ambox-speedy{border-left:10px solid #b32424;background-color:#fee7e6}.mw-parser-output .ambox-delete{border-left:10px solid #b32424}.mw-parser-output .ambox-content{border-left:10px solid #f28500}.mw-parser-output .ambox-style{border-left:10px solid #fc3}.mw-parser-output .ambox-move{border-left:10px solid #9932cc}.mw-parser-output .ambox-protection{border-left:10px solid #a2a9b1}.mw-parser-output .ambox .mbox-text{border:none;padding:0.25em 0.5em;width:100%}.mw-parser-output .ambox .mbox-image{border:none;padding:2px 0 2px 0.5em;text-align:center}.mw-parser-output .ambox .mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><table class="box-Empty_section plainlinks metadata ambox mbox-small-left ambox-content" role="presentation"><tbody><tr><td class="mbox-image"><span typeof="mw:File"><a href="/wiki/File:Wiki_letter_w_cropped.svg" class="mw-file-description"><img alt="[icon]" src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/20px-Wiki_letter_w_cropped.svg.png" decoding="async" width="20" height="14" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/30px-Wiki_letter_w_cropped.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1c/Wiki_letter_w_cropped.svg/40px-Wiki_letter_w_cropped.svg.png 2x" data-file-width="44" data-file-height="31" /></a></span></td><td class="mbox-text"><div class="mbox-text-span"><b>This section is empty.</b> You can help by <a class="external text" href="https://en.wikipedia.org/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=">adding to it</a>. <span class="date-container"><i>(<span class="date">March 2023</span>)</i></span></div></td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Processors">Processors</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=10" title="Edit section: Processors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Main articles: <a href="/wiki/List_of_AMD_FX_processors" title="List of AMD FX processors">List of AMD FX processors</a>, <a href="/wiki/List_of_AMD_processors_with_3D_graphics" title="List of AMD processors with 3D graphics">List of AMD processors with 3D graphics</a>, and <a href="/wiki/Opteron" title="Opteron">Opteron</a></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:AMD_Bulldozer_chipset.PNG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/2/28/AMD_Bulldozer_chipset.PNG/250px-AMD_Bulldozer_chipset.PNG" decoding="async" width="250" height="354" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/2/28/AMD_Bulldozer_chipset.PNG/375px-AMD_Bulldozer_chipset.PNG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/2/28/AMD_Bulldozer_chipset.PNG/500px-AMD_Bulldozer_chipset.PNG 2x" data-file-width="1340" data-file-height="1900" /></a><figcaption>Chipset and I/Os for 1st CMT generation</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:AMD_FX_8350_Prozessor.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/b1/AMD_FX_8350_Prozessor.jpg/220px-AMD_FX_8350_Prozessor.jpg" decoding="async" width="220" height="216" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/b1/AMD_FX_8350_Prozessor.jpg/330px-AMD_FX_8350_Prozessor.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/b1/AMD_FX_8350_Prozessor.jpg/440px-AMD_FX_8350_Prozessor.jpg 2x" data-file-width="481" data-file-height="473" /></a><figcaption>AMD FX 8350 Processor</figcaption></figure> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:AMD_Opteron_6282_SE_(OS6282YETGGGU)-top.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/be/AMD_Opteron_6282_SE_%28OS6282YETGGGU%29-top.jpg/220px-AMD_Opteron_6282_SE_%28OS6282YETGGGU%29-top.jpg" decoding="async" width="220" height="165" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/be/AMD_Opteron_6282_SE_%28OS6282YETGGGU%29-top.jpg/330px-AMD_Opteron_6282_SE_%28OS6282YETGGGU%29-top.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/be/AMD_Opteron_6282_SE_%28OS6282YETGGGU%29-top.jpg/440px-AMD_Opteron_6282_SE_%28OS6282YETGGGU%29-top.jpg 2x" data-file-width="2130" data-file-height="1596" /></a><figcaption>AMD Opteron 6282 processor</figcaption></figure> <p>The first revenue shipments of Bulldozer-based Opteron processors was announced on September 7, 2011.<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> The FX-4100, FX-6100, FX-8120 and FX-8150 were released in October 2011; with remaining FX series AMD processors released at the end of the first quarter of 2012. </p> <div class="mw-heading mw-heading3"><h3 id="Desktop">Desktop</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=11" title="Edit section: Desktop"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="text-align:center"> <tbody><tr> <th rowspan="2">Model </th> <th rowspan="2">[Modules/<a href="/wiki/Floating-point_unit" title="Floating-point unit">FPUs</a>]<br /><a href="#Bulldozer_core">Cores</a>/<a href="/wiki/Thread_(computing)" title="Thread (computing)">threads</a> </th> <th rowspan="2">Freq.<br />(GHz) </th> <th colspan="2">Max. turbo<br />(GHz) </th> <th rowspan="2">L2<br />cache </th> <th rowspan="2">L3<br />(MB) </th> <th rowspan="2">TDP<br />(W) </th> <th rowspan="2">DDR3<br />Memory </th> <th rowspan="2">Turbo<br />Core<br />2.0 </th> <th rowspan="2">Socket </th></tr> <tr> <th>Full<br />load </th> <th>Half<br />load </th></tr> <tr> <td>FX-8100 </td> <td rowspan="5">[4]8 </td> <td>2.8 </td> <td>3.1 </td> <td>3.7 </td> <td rowspan="5">4× <p>2MB </p> </td> <td rowspan="11">8 </td> <td>95 </td> <td rowspan="14">1866 </td> <td rowspan="14">Yes </td> <td rowspan="14"><a href="/wiki/Socket_AM3%2B" title="Socket AM3+">AM3+</a> </td></tr> <tr> <td>FX-8120 </td> <td>3.1 </td> <td>3.4 </td> <td>4.0 </td> <td>125 </td></tr> <tr> <td>FX-8140 </td> <td>3.2 </td> <td>3.6 </td> <td>4.1 </td> <td>95 </td></tr> <tr> <td>FX-8150 </td> <td>3.6 </td> <td>3.9 </td> <td>4.2 </td> <td rowspan="2">125 </td></tr> <tr> <td>FX-8170 </td> <td>3.9 </td> <td>4.2 </td> <td>4.5 </td></tr> <tr> <td>FX-6100 </td> <td rowspan="4">[3]6 </td> <td>3.3 </td> <td>3.6 </td> <td>3.9 </td> <td rowspan="4">3× <p>2MB </p> </td> <td rowspan="3">95 </td></tr> <tr> <td>FX-6120 </td> <td>3.6 </td> <td>3.9 </td> <td>4.2 </td></tr> <tr> <td>FX-6130 </td> <td>3.6 </td> <td>3.8 </td> <td>3.9 </td></tr> <tr> <td>FX-6200 </td> <td>3.8 </td> <td>4.0 </td> <td>4.1 </td> <td>125 </td></tr> <tr> <td>FX-4100 </td> <td rowspan="5">[2]4 </td> <td>3.6 </td> <td>3.7 </td> <td>3.8 </td> <td rowspan="5">2× <p>2MB </p> </td> <td rowspan="2">95 </td></tr> <tr> <td>FX-4120 </td> <td>3.9 </td> <td>4.0 </td> <td>4.1 </td></tr> <tr> <td>FX-4130 </td> <td>3.8 </td> <td rowspan="2">3.9 </td> <td rowspan="2">4.0 </td> <td>4 </td> <td>125 </td></tr> <tr> <td>FX-4150 </td> <td>3.8 </td> <td rowspan="2">8 </td> <td>95/125 </td></tr> <tr> <td>FX-4170 </td> <td>4.2 </td> <td colspan="2">4.3 </td> <td>125 </td></tr></tbody></table> <p>Major Sources: CPU-World<sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup> and Xbit-Labs<sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Server">Server</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=12" title="Edit section: Server"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>There are two series of <a href="/wiki/Opteron#Opteron_(32_nm_SOI)_–_First_Generation_Bulldozer_Microarchitecture" title="Opteron">Bulldozer-based processors for servers</a>: <a href="/wiki/Opteron" title="Opteron">Opteron</a> 4200 series (<a href="/wiki/Socket_C32" title="Socket C32">Socket C32</a>, code named Valencia, with up to four modules) and Opteron 6200 series (<a href="/wiki/Socket_G34" title="Socket G34">Socket G34</a>, code named Interlagos, with up to 8 modules).<sup id="cite_ref-35" class="reference"><a href="#cite_note-35"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-36" class="reference"><a href="#cite_note-36"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="False_advertising_lawsuit">False advertising lawsuit</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=13" title="Edit section: False advertising lawsuit"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>In November 2015, AMD was sued under the <a href="/wiki/California_Consumers_Legal_Remedies_Act" title="California Consumers Legal Remedies Act">California Consumers Legal Remedies Act</a> and <a href="/wiki/California_Unfair_Competition_Law" title="California Unfair Competition Law">Unfair Competition Law</a> for allegedly misrepresenting the specifications of Bulldozer chips. The class-action lawsuit, filed on 26 October in the US District Court for the Northern District of California, claims that each Bulldozer module is in fact a single CPU core with a few dual-core traits, rather than a true dual-core design.<sup id="cite_ref-ars-fxlawsuit_37-0" class="reference"><a href="#cite_note-ars-fxlawsuit-37"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> In August 2019, AMD agreed to settle the suit for $12.1M.<sup id="cite_ref-AT-fxsettlement_38-0" class="reference"><a href="#cite_note-AT-fxsettlement-38"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-AMDCPUsettlementWS_39-0" class="reference"><a href="#cite_note-AMDCPUsettlementWS-39"><span class="cite-bracket">[</span>39<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Performance">Performance</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=14" title="Edit section: Performance"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <div class="mw-heading mw-heading3"><h3 id="Performance_on_Linux">Performance on Linux</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=15" title="Edit section: Performance on Linux"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>On 24 October 2011, the first generation tests done by <a href="/wiki/Phoronix" class="mw-redirect" title="Phoronix">Phoronix</a> confirmed that the performance of Bulldozer CPU was somewhat less than expected.<sup id="cite_ref-40" class="reference"><a href="#cite_note-40"><span class="cite-bracket">[</span>40<span class="cite-bracket">]</span></a></sup> In several tests, the CPU performed similarly to the older generation Phenom 1060T. </p><p>The performance later substantially increased, as various compiler optimizations and CPU driver fixes were released.<sup id="cite_ref-41" class="reference"><a href="#cite_note-41"><span class="cite-bracket">[</span>41<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-42" class="reference"><a href="#cite_note-42"><span class="cite-bracket">[</span>42<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Performance_on_Windows">Performance on Windows</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=16" title="Edit section: Performance on Windows"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The first Bulldozer CPUs were met with a mixed response. It was discovered that the FX-8150 performed poorly in benchmarks that were not highly threaded, falling behind the second-generation Intel Core i* series processors and being matched or even outperformed by AMD's own Phenom II X6 at lower clock speeds. In highly threaded benchmarks, the FX-8150 performed on par with the Phenom II X6, and the <a href="/wiki/Intel_Core#Core_i7_2" title="Intel Core">Intel Core i7 2600K</a>, depending on the benchmark. Given the overall more consistent performance of the <a href="/wiki/Intel_Core#Core_i5_2" title="Intel Core">Intel Core i5 2500K</a> at a lower price, these results left many reviewers underwhelmed. The processor was found to be extremely <a href="/wiki/Power_management" title="Power management">power-hungry</a> under load, especially when overclocked, compared to <a href="/wiki/Sandy_Bridge_(microarchitecture)" class="mw-redirect" title="Sandy Bridge (microarchitecture)">Intel's Sandy Bridge</a>.<sup id="cite_ref-43" class="reference"><a href="#cite_note-43"><span class="cite-bracket">[</span>43<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-44" class="reference"><a href="#cite_note-44"><span class="cite-bracket">[</span>44<span class="cite-bracket">]</span></a></sup> </p><p>On 13 October 2011, AMD stated on its blog that "there are some in our community who feel the product performance did not meet their expectations", but showed benchmarks on actual applications where it outperformed the Sandy Bridge i7 2600k and AMD X6 1100T.<sup id="cite_ref-45" class="reference"><a href="#cite_note-45"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> </p><p>In January 2012, Microsoft released two hotfixes for Windows 7 and Server 2008 R2 that marginally improve the performance of Bulldozer CPUs by addressing the thread scheduling concerns raised after the release of Bulldozer.<sup id="cite_ref-46" class="reference"><a href="#cite_note-46"><span class="cite-bracket">[</span>46<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-47" class="reference"><a href="#cite_note-47"><span class="cite-bracket">[</span>47<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-48" class="reference"><a href="#cite_note-48"><span class="cite-bracket">[</span>48<span class="cite-bracket">]</span></a></sup> </p><p>On 6 March 2012, AMD posted a knowledge base article stating that there was a compatibility problem with FX processors, and certain games on the widely used digital game distribution platform, <a href="/wiki/Steam_(service)" title="Steam (service)">Steam</a>. AMD stated that they had provided a <a href="/wiki/BIOS" title="BIOS">BIOS</a> update to several motherboard manufacturers (namely: <a href="/wiki/Asus" title="Asus">Asus</a>, <a href="/wiki/Gigabyte_Technology" title="Gigabyte Technology">Gigabyte Technology</a>, <a href="/wiki/Micro-Star_International" title="Micro-Star International">MSI</a>, and <a href="/wiki/ASRock" title="ASRock">ASRock</a>) that would fix the problem.<sup id="cite_ref-49" class="reference"><a href="#cite_note-49"><span class="cite-bracket">[</span>49<span class="cite-bracket">]</span></a></sup> </p><p>In September 2014, AMD CEO Rory Read conceded the Bulldozer design had not been a "game-changing part", and that AMD had to live with the design for four years.<sup id="cite_ref-50" class="reference"><a href="#cite_note-50"><span class="cite-bracket">[</span>50<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Overclocking">Overclocking</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=17" title="Edit section: Overclocking"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>On 31 August 2011, AMD and a group of well-known overclockers including Brian McLachlan, Sami Mäkinen, Aaron Schradin, and Simon Solotko managed to set a new world record for CPU frequency using the unreleased and overclocked FX-8150 Bulldozer processor. Before that day, the record sat at 8.309 GHz, but the Bulldozer combined with <a href="/wiki/Liquid_helium" title="Liquid helium">liquid helium</a> <a href="/wiki/Computer_cooling" title="Computer cooling">cooling</a> reached a new high of 8.429 GHz. The record has since been overtaken at 8.58 GHz by Andre Yang using <a href="/wiki/Liquid_nitrogen" title="Liquid nitrogen">liquid nitrogen</a>.<sup id="cite_ref-51" class="reference"><a href="#cite_note-51"><span class="cite-bracket">[</span>51<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-52" class="reference"><a href="#cite_note-52"><span class="cite-bracket">[</span>52<span class="cite-bracket">]</span></a></sup> On August 22, 2014 and using an FX-8370 (Piledriver), The Stilt from Team Finland achieved a maximum CPU frequency of 8.722 GHz.<sup id="cite_ref-53" class="reference"><a href="#cite_note-53"><span class="cite-bracket">[</span>53<span class="cite-bracket">]</span></a></sup> </p><p>The CPU clock frequency records set by overclocked Bulldozer CPUs were only broken almost a decade later by overclocks of Intel's 13th generation Core <a href="/wiki/Raptor_Lake" title="Raptor Lake">Raptor Lake</a> CPUs in October 2022.<sup id="cite_ref-54" class="reference"><a href="#cite_note-54"><span class="cite-bracket">[</span>54<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="Revisions">Revisions</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=18" title="Edit section: Revisions"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p><i><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></i> is the AMD codename for its improved second-generation microarchitecture based on <i>Bulldozer</i>. AMD <i>Piledriver</i> cores are found in <a href="/wiki/Socket_FM2" title="Socket FM2">Socket FM2</a> <i>Trinity</i> and <i>Richland</i> based series of APUs and CPUs and the Socket AM3+ <i>Vishera</i> based FX-series of CPUs. Piledriver was the last generation in the Bulldozer family to be available for socket AM3+ and to be available with an L3 cache. The Piledriver processors available for FM2 (and its mobile variant) sockets did not come with a L3 cache, as the L2 cache is the last-level cache for all FM2/FM2+ processors. </p><p><i><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></i> is the AMD codename for its third-generation microarchitecture based on an improved version of <i>Piledriver</i>. <i>Steamroller</i> cores are found in the <a href="/wiki/Socket_FM2%2B" title="Socket FM2+">Socket FM2+</a> <i>Kaveri</i> based series of APUs and CPUs. </p><p><i><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></i> is the codename for the fourth-generation <i>Bulldozer</i> core.<sup id="cite_ref-55" class="reference"><a href="#cite_note-55"><span class="cite-bracket">[</span>55<span class="cite-bracket">]</span></a></sup> <i>Excavator</i> was implemented as 'Carrizo' A-series APUs, "Bristol Ridge" A-series APUs, and Athlon x4 CPUs.<sup id="cite_ref-anandtech_carizzo_56-0" class="reference"><a href="#cite_note-anandtech_carizzo-56"><span class="cite-bracket">[</span>56<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=19" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">List of AMD CPU microarchitectures</a></li> <li><a href="/wiki/List_of_AMD_FX_microprocessors" class="mw-redirect" title="List of AMD FX microprocessors">List of AMD FX microprocessors</a></li> <li><a href="/wiki/Charles_R._Moore_(computer_engineer)" title="Charles R. Moore (computer engineer)">Charles R. Moore (computer engineer)</a></li> <li><a href="/wiki/Alpha_21264" title="Alpha 21264">Alpha 21264</a></li> <li><a href="/wiki/AMD_K10" class="mw-redirect" title="AMD K10">K10 (microarchitecture)</a></li> <li><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat (microarchitecture)</a></li> <li><a href="/wiki/Opteron" title="Opteron">Opteron</a></li> <li><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver (microarchitecture)</a></li> <li><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller (microarchitecture)</a></li> <li><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator (microarchitecture)</a></li> <li><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen (microarchitecture)</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=20" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist reflist-columns references-column-width" style="column-width: 30em;"> <ol class="references"> <li id="cite_note-amd1-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-amd1_1-0">^</a></b></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.amd.com/en-gb/products/processors/desktop/fx#">"FX Processors"</a>. <i>AMD</i>. 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November 5, 2011.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=tomshardware.com&rft.atitle=AMD+Bulldozer+Speed+Record+Broken+Again+at+8.58GHz&rft.date=2011-11-05&rft_id=http%3A%2F%2Fwww.tomshardware.com%2Fnews%2Ffx-8150-bulldozer-record-overclocking-speed%2C13903.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3ABulldozer+%28microarchitecture%29" class="Z3988"></span></span> </li> <li id="cite_note-53"><span class="mw-cite-backlink"><b><a href="#cite_ref-53">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSamuel_D." class="citation web cs1">Samuel D. <a rel="nofollow" class="external text" href="http://valid.canardpc.com/vytt61">"CPU-Z Validator 4.0"</a><span class="reference-accessdate">. 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Retrieved <span class="nowrap">October 23,</span> 2022</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=valid.x86.fr&rft.atitle=Intel+Core+i9+13900K+%40+8812.85+MHz+-+CPU-Z+VALIDATOR&rft_id=https%3A%2F%2Fvalid.x86.fr%2Fk3dwcu&rfr_id=info%3Asid%2Fen.wikipedia.org%3ABulldozer+%28microarchitecture%29" class="Z3988"></span></span> </li> <li id="cite_note-55"><span class="mw-cite-backlink"><b><a href="#cite_ref-55">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="http://www.anandtech.com/show/4955/the-bulldozer-review-amd-fx8150-tested"><i>The Bulldozer Review: AMD FX-8150 Tested</i></a>, AnandTech, October 12, 2011<span class="reference-accessdate">, retrieved <span class="nowrap">January 23,</span> 2012</span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=The+Bulldozer+Review%3A+AMD+FX-8150+Tested&rft.pub=AnandTech&rft.date=2011-10-12&rft_id=http%3A%2F%2Fwww.anandtech.com%2Fshow%2F4955%2Fthe-bulldozer-review-amd-fx8150-tested&rfr_id=info%3Asid%2Fen.wikipedia.org%3ABulldozer+%28microarchitecture%29" class="Z3988"></span></span> </li> <li id="cite_note-anandtech_carizzo-56"><span class="mw-cite-backlink"><b><a href="#cite_ref-anandtech_carizzo_56-0">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCutress2016" class="citation web cs1">Cutress, Ian (February 2, 2016). <a rel="nofollow" class="external text" href="http://www.anandtech.com/show/10009/amd-launches-excavator-on-desktop-the-65w-athlon-x4-845-for-70">"AMD launches excavator on desktop: the 65w athlon x4 845 for $70"</a>. <i>anandtech</i><span class="reference-accessdate">. Retrieved <span class="nowrap">March 28,</span> 2017</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=anandtech&rft.atitle=AMD+launches+excavator+on+desktop%3A+the+65w+athlon+x4+845+for+%2470&rft.date=2016-02-02&rft.aulast=Cutress&rft.aufirst=Ian&rft_id=http%3A%2F%2Fwww.anandtech.com%2Fshow%2F10009%2Famd-launches-excavator-on-desktop-the-65w-athlon-x4-845-for-70&rfr_id=info%3Asid%2Fen.wikipedia.org%3ABulldozer+%28microarchitecture%29" class="Z3988"></span></span> </li> </ol></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Bulldozer_(microarchitecture)&action=edit&section=21" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" 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class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/List_of_AMD_processors" title="List of AMD processors">Processors</a> <ul><li><a href="/wiki/List_of_AMD_K5_processors" title="List of AMD K5 processors">K5</a></li> <li><a href="/wiki/List_of_AMD_K6_processors" title="List of AMD K6 processors">K6</a></li> <li><a href="/wiki/List_of_AMD_Athlon_processors" title="List of AMD Athlon processors">Athlon</a> <ul><li><a href="/wiki/List_of_AMD_Athlon_XP_processors" title="List of AMD Athlon XP processors">XP</a></li> <li><a href="/wiki/List_of_AMD_Athlon_64_processors" title="List of AMD Athlon 64 processors">64</a></li> <li><a href="/wiki/List_of_AMD_Athlon_X2_processors" title="List of AMD Athlon X2 processors">X2</a></li> <li><a href="/wiki/List_of_AMD_Athlon_II_processors" title="List of AMD Athlon II processors">II</a></li></ul></li> <li><a href="/wiki/List_of_AMD_Phenom_processors" title="List of AMD Phenom processors">Phenom</a></li> <li><a href="/wiki/List_of_AMD_FX_processors" title="List of AMD FX processors">FX</a></li> <li><a href="/wiki/List_of_AMD_Ryzen_processors" title="List of AMD Ryzen processors">Ryzen</a></li> <li><a href="/wiki/List_of_AMD_Duron_processors" title="List of AMD Duron processors">Duron</a></li> <li><a href="/wiki/List_of_AMD_Sempron_processors" title="List of AMD Sempron processors">Sempron</a></li> <li><a href="/wiki/List_of_AMD_Turion_processors" title="List of AMD Turion processors">Turion</a></li> <li><a href="/wiki/List_of_AMD_Opteron_processors" title="List of AMD Opteron processors">Opteron</a></li> <li><a href="/wiki/List_of_AMD_Epyc_processors" class="mw-redirect" title="List of AMD Epyc processors">Epyc</a></li></ul></li> <li><a href="/wiki/List_of_AMD_processors_with_3D_graphics" title="List of AMD processors with 3D graphics">APUs</a></li> <li><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_AMD_chipsets" title="List of AMD chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_AMD_CPU_microarchitectures" title="List of AMD CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon/K7</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 desktop</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K8" title="AMD K8">K8</a></li> <li><a href="/wiki/AMD_K9" title="AMD K9">K9</a></li> <li><a href="/wiki/AMD_10h" title="AMD 10h">K10 (aka 10h)</a></li> <li>15h <ul><li><a class="mw-selflink selflink">Bulldozer</a></li> <li><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></li> <li><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></li> <li><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></li></ul></li> <li><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a> <ul><li><a href="/wiki/Zen_(first_generation_microarchitecture)" class="mw-redirect" title="Zen (first generation microarchitecture)">1st gen</a></li> <li><a href="/wiki/Zen%2B" title="Zen+">Zen+</a></li> <li><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a></li> <li><a href="/wiki/Zen_3" title="Zen 3">Zen 3</a></li> <li><a href="/wiki/Zen_3%2B" class="mw-redirect" title="Zen 3+">Zen 3+</a></li> <li><a href="/wiki/Zen_4" title="Zen 4">Zen 4</a></li> <li><a href="/wiki/Zen_5" title="Zen 5">Zen 5</a></li> <li><i><a href="/wiki/Zen_6" title="Zen 6">Zen 6</a></i></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">x86-64 low-power</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat (aka 14h)</a></li> <li>16h <ul><li><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a></li> <li><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/ARM_architecture_family#ARMv8-A" title="ARM architecture family">ARM64</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_K12" title="AMD K12">K12 (aka 12h)</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon" title="Athlon">Athlon</a></li> <li><a href="/wiki/Ryzen" title="Ryzen">Ryzen</a></li> <li><a href="/wiki/Threadripper" title="Threadripper">Threadripper</a></li> <li><a href="/wiki/Epyc" title="Epyc">Epyc</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;background-color: #DDDDDD">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Early x86 (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am286" class="mw-redirect" title="Am286">Am286</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Am386" title="Am386">Am386</a></li> <li><a href="/wiki/Am486" title="Am486">Am486</a></li> <li><a href="/wiki/Am5x86" title="Am5x86">Am5x86</a></li> <li><a href="/wiki/AMD_K5" title="AMD K5">K5</a></li> <li><a href="/wiki/AMD_K6" title="AMD K6">K6</a></li> <li><a href="/wiki/AMD_K6-2" title="AMD K6-2">K6-2</a></li> <li><a href="/wiki/AMD_K6-III" title="AMD K6-III">K6-III</a></li> <li><a href="/wiki/Athlon" title="Athlon">Athlon</a> <ul><li><a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">XP</a></li> <li><a href="/wiki/Athlon_MP" class="mw-redirect" title="Athlon MP">MP</a></li></ul></li> <li><a href="/wiki/Duron" title="Duron">Duron</a></li> <li><a href="/wiki/Geode_(processor)" title="Geode (processor)">Geode</a></li> <li><a href="/wiki/AMD_%C3%89lan" title="AMD Élan">AMD Élan</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> <ul><li><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">X2</a></li> <li><a href="/wiki/Athlon_II" title="Athlon II">II</a></li></ul></li> <li><a href="/wiki/Sempron" title="Sempron">Sempron</a></li> <li><a href="/wiki/AMD_Turion" title="AMD Turion">Turion</a></li> <li><a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a> <ul><li><a href="/wiki/Phenom_II" title="Phenom II">II</a></li></ul></li> <li><a href="/wiki/AMD_FX" title="AMD FX">FX</a></li> <li><a href="/wiki/Opteron" title="Opteron">Opteron</a></li> <li><a href="/wiki/AMD_APU" title="AMD APU">A-series APUs</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:8.5em;background-color: #E6E6E6">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/AMD_Am9080" title="AMD Am9080">Am9080</a></li> <li><a href="/wiki/AMD_Am2900" title="AMD Am2900">Am2900</a> <ul><li><a href="/wiki/List_of_AMD_Am2900_and_Am29000_families" title="List of AMD Am2900 and Am29000 families">list</a></li></ul></li> <li><a href="/wiki/AMD_Am29000" title="AMD Am29000">Am29000</a></li> <li><a href="/wiki/Alchemy_(microarchitecture)" class="mw-redirect" title="Alchemy (microarchitecture)">Alchemy</a> <ul><li><a href="/wiki/MIPS_architecture#MIPS32" title="MIPS architecture">MIPS32</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div><i>Italics</i> indicates an upcoming architecture.</div></td></tr></tbody></table></div> <div class="navbox-styles"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1236075235"></div><div role="navigation" class="navbox" aria-labelledby="AMD_CPU_core_roadmaps_from_K7_to_Zen" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1239400231"><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:AMD_processor_roadmap" title="Template:AMD processor roadmap"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:AMD_processor_roadmap" title="Template talk:AMD processor roadmap"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:AMD_processor_roadmap" title="Special:EditPage/Template:AMD processor roadmap"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="AMD_CPU_core_roadmaps_from_K7_to_Zen" style="font-size:114%;margin:0 4em">AMD CPU core roadmaps from <a href="/wiki/K7_(microarchitecture)" class="mw-redirect" title="K7 (microarchitecture)">K7</a> to <a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a></div></th></tr><tr><td colspan="2" class="navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"><table class="wikitable" style="border:none; text-align:center;"> <tbody><tr> <th colspan="2" style="background-color:#E6E6FF"><a href="/wiki/AMD_Turion" title="AMD Turion">Turion</a> / ULV</th> <td rowspan="32" style="background-color:white; border:none;"></td> <th rowspan="2">Node range<br />label</th> <td rowspan="32" style="background-color:white; border:none;"></td> <th colspan="2" style="background-color:#E6E6FF"><a href="/wiki/X86" title="X86">x86</a></th> <td colspan="4" rowspan="10" style="background-color:white; border:none;"></td> </tr> <tr> <th style="background-color:#E6E6FF"><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchi.</a></th> <th style="background-color:#E6E6FF">Step</th> <th style="background-color:#E6E6FF"><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchi.</a></th> <th style="background-color:#E6E6FF">Step</th> </tr> <tr> <td colspan="2" rowspan="8"></td> <th rowspan="3"><a href="/wiki/180_nm_process" title="180 nm process">180 nm</a></th> <td rowspan="5"><b><a href="/wiki/K7_(microarchitecture)" class="mw-redirect" title="K7 (microarchitecture)">K7</a></b></td> <td><a href="/wiki/Athlon" title="Athlon">Athlon Classic</a></td> </tr> <tr> <td><a href="/wiki/Athlon" title="Athlon">Thunderbird</a></td> </tr> <tr> <td><a href="/wiki/Athlon" title="Athlon">Palomino</a></td> </tr> <tr> <th rowspan="5"><a href="/wiki/130_nm_process" title="130 nm process">130 nm</a></th> <td><a href="/wiki/Athlon" title="Athlon">Thoroughbred</a></td> </tr> <tr> <td><a href="/wiki/Athlon" title="Athlon">Barton/Thorton</a></td> </tr> <tr> <td rowspan="7"><b><a href="/wiki/AMD_K8" title="AMD K8">K8</a></b></td> <td><a href="/wiki/Athlon_64" title="Athlon 64">ClawHammer</a></td> </tr> <tr> <td><a href="/wiki/Athlon_64" title="Athlon 64">Newcastle</a></td> </tr> <tr> <td><a href="/wiki/Athlon_64" title="Athlon 64">SledgeHammer</a></td> </tr> <tr> <td rowspan="6"><b><a href="/wiki/AMD_Turion" title="AMD Turion">K8L</a></b></td> <td rowspan="1"><a href="/wiki/AMD_Turion#Lancaster_(90_nm_SOI)" title="AMD Turion">Lancaster</a></td> <th rowspan="3"><a href="/wiki/90_nm_process" title="90 nm process">90 nm</a></th> <td><a href="/wiki/Athlon_64" title="Athlon 64">Winchester</a></td> <td style="background-color:white; border:none;"></td> <th style="background-color:#E6E6FF">K8(<a href="/wiki/Multi-core_processor" title="Multi-core processor">×2</a>)</th> <td style="background-color:white; border:none;"></td> <th style="background-color:#E6E6FF"><a href="/wiki/AMD_K9" title="AMD K9">K9</a></th> </tr> <tr> <td rowspan="1"><a href="/wiki/AMD_Turion#Richmond_(90_nm_SOI)" title="AMD Turion">Richmond</a></td> <td rowspan="2"><a href="/wiki/Athlon_64" title="Athlon 64">San Diego</a></td> <td style="background-color:white; border:none;"></td> <td><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">Toledo</a></td> <td style="background-color:white; border:none;"></td> <td><s><a href="/wiki/AMD_K9" title="AMD K9">Greyhound</a></s></td> </tr> <tr> <td rowspan="1"><a href="/wiki/AMD_Turion#Taylor_&_Trinidad_(90_nm_SOI)" title="AMD Turion">Taylor / Trinidad</a></td> <td style="background-color:white; border:none;"></td> <td><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">Windsor</a></td> <td colspan="2" rowspan="2" style="background-color:white; border:none;"></td> </tr> <tr> <td rowspan="1"><a href="/wiki/AMD_Turion#Tyler_(65_nm_SOI)" title="AMD Turion">Tyler</a></td> <th rowspan="2"><a href="/wiki/65_nm_process" title="65 nm process">65 nm</a></th> <td><a href="/wiki/Athlon_64" title="Athlon 64">Orleans</a></td> <td style="background-color:white; border:none;"></td> <td><a href="/wiki/Athlon_64_X2" title="Athlon 64 X2">Brisbane</a></td> </tr> <tr> <td rowspan="1"><a href="/wiki/AMD_Turion#Lion_(65_nm_SOI)" title="AMD Turion">Lion</a></td> <td rowspan="2"><b><a href="/wiki/AMD_10h" title="AMD 10h">K10</a></b></td> <td><a href="/wiki/AMD_Phenom" title="AMD Phenom">Phenom</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">4 cores on mainstream desktop, <a href="/wiki/DDR3_SDRAM" title="DDR3 SDRAM">DDR3</a> introduced</td> </tr> <tr> <td rowspan="1"><a href="/wiki/AMD_Turion#Caspian_(45_nm_SOI)" title="AMD Turion">Caspian</a></td> <th rowspan="1"><a href="/wiki/45_nm_process" title="45 nm process">45 nm</a></th> <td><a href="/wiki/Phenom_II" title="Phenom II">Phenom II</a> / <a href="/wiki/Athlon_II" title="Athlon II">Athlon II</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">6 cores on mainstream desktop</td> </tr> <tr> <td rowspan="1"><b>14h</b></td> <td><a href="/wiki/Bobcat_(microarchitecture)" title="Bobcat (microarchitecture)">Bobcat</a></td> <th rowspan="1"><a href="/wiki/Die_shrink#Half-shrink" title="Die shrink">40 nm</a></th> <td colspan="6" rowspan="1" style="background-color:white; border:none;"></td> </tr> <tr> <td colspan="2" rowspan="4"></td> <th rowspan="4"><a href="/wiki/32_nm_process" title="32 nm process">32 nm</a></th> <td rowspan="2"><b><a href="/wiki/AMD_10h" title="AMD 10h">K10</a></b></td> <td>Lynx</td> <td colspan="4" rowspan="1" style="background-color:white; border:none;"></td> </tr> <tr> <td>Llano</td> <td colspan="4" style="text-align:left; background-color:white; border:none;"><a href="/wiki/AMD_APU" title="AMD APU">APU</a> introduced; CPU and GPU on single die</td> </tr> <tr> <td rowspan="4"><b><a class="mw-selflink selflink">Bulldozer 15h</a></b></td> <td><a class="mw-selflink selflink">Bulldozer</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">8 cores on mainstream desktop</td> </tr> <tr> <td><a href="/wiki/Piledriver_(microarchitecture)" title="Piledriver (microarchitecture)">Piledriver</a></td> <td colspan="4" rowspan="1" style="background-color:white; border:none;"></td> </tr> <tr> <td rowspan="2"><b>16h</b></td> <td><a href="/wiki/Jaguar_(microarchitecture)" title="Jaguar (microarchitecture)">Jaguar</a></td> <th rowspan="2"><a href="/wiki/Die_shrink#Half-shrink" title="Die shrink">28 nm</a></th> <td><a href="/wiki/Steamroller_(microarchitecture)" title="Steamroller (microarchitecture)">Steamroller</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">APU/mobile-only</td> </tr> <tr> <td><a href="/wiki/Puma_(microarchitecture)" title="Puma (microarchitecture)">Puma</a></td> <td><a href="/wiki/Excavator_(microarchitecture)" title="Excavator (microarchitecture)">Excavator</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">APU/mobile-only, <a href="/wiki/DDR4_SDRAM" title="DDR4 SDRAM">DDR4</a> introduced</td> </tr> <tr> <td rowspan="1"><b><a href="/wiki/AMD_K12" title="AMD K12">K12</a></b></td> <td><s><a href="/wiki/AMD_K12" title="AMD K12">K12 (ARM64)</a></s></td> <th rowspan="1"><a href="/wiki/14_nm_process" title="14 nm process">14 nm</a></th> <td rowspan="9"><b><a href="/wiki/Zen_(microarchitecture)" title="Zen (microarchitecture)">Zen</a></b></td> <td><a href="/wiki/Zen_(first_generation)" title="Zen (first generation)">Zen</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;"><a href="/wiki/Simultaneous_multithreading" title="Simultaneous multithreading">SMT</a> introduced</td> </tr> <tr> <td colspan="2" rowspan="8"></td> <th rowspan="1"><a href="/wiki/Die_shrink#Half-shrink" title="Die shrink">12 nm</a></th> <td><a href="/wiki/Zen%2B" title="Zen+">Zen+</a></td> <td colspan="4" rowspan="1" style="background-color:white; border:none;"></td> </tr> <tr> <th rowspan="2"><a href="/wiki/7_nm_process" title="7 nm process">7 nm</a></th> <td><a href="/wiki/Zen_2" title="Zen 2">Zen 2</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">12 and 16 cores on mainstream desktop, <a href="/wiki/Multi-chip_module" title="Multi-chip module">chiplet</a> design</td> </tr> <tr> <td><a href="/wiki/Zen_3" title="Zen 3">Zen 3</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">3D V-Cache variants introduced</td> </tr> <tr> <th rowspan="1"><a href="/wiki/Die_shrink#Half-shrink" title="Die shrink">6 nm</a></th> <td>Zen 3+</td> <td colspan="4" style="text-align:left; background-color:white; border:none;">Mobile-only, <a href="/wiki/DDR5_SDRAM" title="DDR5 SDRAM">DDR5</a> introduced</td> </tr> <tr> <th rowspan="1"><a href="/wiki/5_nm_process" title="5 nm process">5 nm / 4 nm</a></th> <td><a href="/wiki/Zen_4" title="Zen 4">Zen 4</a></td> <td colspan="4" style="text-align:left; background-color:white; border:none;">High core density "Cloud" (Zen <i>x</i>c) variants introduced</td> </tr> <tr> <th rowspan="1"><a href="/wiki/5_nm_process" title="5 nm process">4 nm</a> / <a href="/wiki/3_nm_process" title="3 nm process">3 nm</a></th> <td><a href="/wiki/Zen_5" title="Zen 5">Zen 5</a></td> <td colspan="4" rowspan="1" style="background-color:white; border:none;"></td> </tr> <tr> <th rowspan="1"><a href="/wiki/3_nm_process" title="3 nm process">3 nm</a> / <a href="/wiki/2_nm_process" title="2 nm process">2 nm</a></th> <td><i><a href="/wiki/Zen_6" title="Zen 6">Zen 6</a></i></td> <td colspan="4" rowspan="1" style="background-color:white; border:none;"></td> </tr> <tr> <th rowspan="1"><a href="/wiki/2_nm_process" title="2 nm process">2 nm</a></th> <td><i><a href="/w/index.php?title=Zen_7&action=edit&redlink=1" class="new" title="Zen 7 (page does not exist)">Zen 7</a></i></td> <td colspan="4" rowspan="1" style="background-color:white; border:none;"></td> </tr> </tbody></table> <ul style="text-align:left;"> <li><s>Strike-through</s> indicates cancelled processors </li><li><b>Bold names</b> are the microarchitecture names </li><li><i>Italic names</i> are future processors </li></ul></div></td></tr></tbody></table></div>    </div><noscript><img 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