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title="Streaming SIMD Extensions 2 – German" lang="de" hreflang="de" data-title="Streaming SIMD Extensions 2" data-language-autonym="Deutsch" data-language-local-name="German" class="interlanguage-link-target"><span>Deutsch</span></a></li><li class="interlanguage-link interwiki-et mw-list-item"><a href="https://et.wikipedia.org/wiki/SSE2" title="SSE2 – Estonian" lang="et" hreflang="et" data-title="SSE2" data-language-autonym="Eesti" data-language-local-name="Estonian" class="interlanguage-link-target"><span>Eesti</span></a></li><li class="interlanguage-link interwiki-es mw-list-item"><a href="https://es.wikipedia.org/wiki/SSE2" title="SSE2 – Spanish" lang="es" hreflang="es" data-title="SSE2" data-language-autonym="Español" data-language-local-name="Spanish" class="interlanguage-link-target"><span>Español</span></a></li><li class="interlanguage-link interwiki-fa mw-list-item"><a href="https://fa.wikipedia.org/wiki/SSE2" title="SSE2 – Persian" lang="fa" hreflang="fa" data-title="SSE2" data-language-autonym="فارسی" data-language-local-name="Persian" class="interlanguage-link-target"><span>فارسی</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Streaming_SIMD_Extension_2" title="Streaming SIMD Extension 2 – French" lang="fr" hreflang="fr" data-title="Streaming SIMD Extension 2" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/SSE2" title="SSE2 – Korean" lang="ko" hreflang="ko" data-title="SSE2" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-it mw-list-item"><a href="https://it.wikipedia.org/wiki/SSE2" title="SSE2 – Italian" lang="it" hreflang="it" data-title="SSE2" data-language-autonym="Italiano" data-language-local-name="Italian" class="interlanguage-link-target"><span>Italiano</span></a></li><li class="interlanguage-link interwiki-hu mw-list-item"><a href="https://hu.wikipedia.org/wiki/SSE2" title="SSE2 – Hungarian" lang="hu" hreflang="hu" data-title="SSE2" data-language-autonym="Magyar" data-language-local-name="Hungarian" class="interlanguage-link-target"><span>Magyar</span></a></li><li class="interlanguage-link interwiki-nl mw-list-item"><a href="https://nl.wikipedia.org/wiki/SSE2" title="SSE2 – Dutch" lang="nl" hreflang="nl" data-title="SSE2" data-language-autonym="Nederlands" data-language-local-name="Dutch" class="interlanguage-link-target"><span>Nederlands</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/SSE2" title="SSE2 – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="SSE2" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-pl mw-list-item"><a href="https://pl.wikipedia.org/wiki/SSE2" title="SSE2 – Polish" lang="pl" hreflang="pl" data-title="SSE2" data-language-autonym="Polski" data-language-local-name="Polish" class="interlanguage-link-target"><span>Polski</span></a></li><li class="interlanguage-link interwiki-pt mw-list-item"><a href="https://pt.wikipedia.org/wiki/SSE2" title="SSE2 – Portuguese" lang="pt" hreflang="pt" data-title="SSE2" data-language-autonym="Português" data-language-local-name="Portuguese" class="interlanguage-link-target"><span>Português</span></a></li><li class="interlanguage-link interwiki-ru mw-list-item"><a href="https://ru.wikipedia.org/wiki/SSE2" title="SSE2 – Russian" lang="ru" hreflang="ru" data-title="SSE2" data-language-autonym="Русский" data-language-local-name="Russian" class="interlanguage-link-target"><span>Русский</span></a></li><li class="interlanguage-link interwiki-fi mw-list-item"><a href="https://fi.wikipedia.org/wiki/SSE2" title="SSE2 – Finnish" lang="fi" hreflang="fi" data-title="SSE2" data-language-autonym="Suomi" data-language-local-name="Finnish" class="interlanguage-link-target"><span>Suomi</span></a></li><li class="interlanguage-link interwiki-uk mw-list-item"><a href="https://uk.wikipedia.org/wiki/SSE2" title="SSE2 – Ukrainian" lang="uk" hreflang="uk" data-title="SSE2" data-language-autonym="Українська" data-language-local-name="Ukrainian" class="interlanguage-link-target"><span>Українська</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/SSE2" title="SSE2 – Chinese" lang="zh" hreflang="zh" data-title="SSE2" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a 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.mbox-imageright{border:none;padding:2px 0.5em 2px 0;text-align:center}.mw-parser-output .ambox .mbox-empty-cell{border:none;padding:0;width:1px}.mw-parser-output .ambox .mbox-image-div{width:52px}@media(min-width:720px){.mw-parser-output .ambox{margin:0 10%}}@media print{body.ns-0 .mw-parser-output .ambox{display:none!important}}</style><style data-mw-deduplicate="TemplateStyles:r1248332772">.mw-parser-output .multiple-issues-text{width:95%;margin:0.2em 0}.mw-parser-output .multiple-issues-text>.mw-collapsible-content{margin-top:0.3em}.mw-parser-output .compact-ambox .ambox{border:none;border-collapse:collapse;background-color:transparent;margin:0 0 0 1.6em!important;padding:0!important;width:auto;display:block}body.mediawiki .mw-parser-output .compact-ambox .ambox.mbox-small-left{font-size:100%;width:auto;margin:0}.mw-parser-output .compact-ambox .ambox .mbox-text{padding:0!important;margin:0!important}.mw-parser-output .compact-ambox .ambox .mbox-text-span{display:list-item;line-height:1.5em;list-style-type:disc}body.skin-minerva .mw-parser-output .multiple-issues-text>.mw-collapsible-toggle,.mw-parser-output .compact-ambox .ambox .mbox-image,.mw-parser-output .compact-ambox .ambox .mbox-imageright,.mw-parser-output .compact-ambox .ambox .mbox-empty-cell,.mw-parser-output .compact-ambox .hide-when-compact{display:none}</style><table class="box-Multiple_issues plainlinks metadata ambox ambox-content ambox-multiple_issues compact-ambox" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/40px-Ambox_important.svg.png" decoding="async" width="40" height="40" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/60px-Ambox_important.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/b/b4/Ambox_important.svg/80px-Ambox_important.svg.png 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src="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/50px-Question_book-new.svg.png" decoding="async" width="50" height="39" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/75px-Question_book-new.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/9/99/Question_book-new.svg/100px-Question_book-new.svg.png 2x" data-file-width="512" data-file-height="399" /></a></span></div></td><td class="mbox-text"><div class="mbox-text-span">This article <b>needs additional citations for <a href="/wiki/Wikipedia:Verifiability" title="Wikipedia:Verifiability">verification</a></b>.<span class="hide-when-compact"> Please help <a href="/wiki/Special:EditPage/SSE2" title="Special:EditPage/SSE2">improve this article</a> by <a href="/wiki/Help:Referencing_for_beginners" title="Help:Referencing for beginners">adding citations to reliable sources</a>. Unsourced material may be challenged and removed.<br /><small><span class="plainlinks"><i>Find sources:</i> <a rel="nofollow" class="external text" href="https://www.google.com/search?as_eq=wikipedia&q=%22SSE2%22">"SSE2"</a> – <a rel="nofollow" class="external text" href="https://www.google.com/search?tbm=nws&q=%22SSE2%22+-wikipedia&tbs=ar:1">news</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?&q=%22SSE2%22&tbs=bkt:s&tbm=bks">newspapers</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.google.com/search?tbs=bks:1&q=%22SSE2%22+-wikipedia">books</a> <b>·</b> <a rel="nofollow" class="external text" href="https://scholar.google.com/scholar?q=%22SSE2%22">scholar</a> <b>·</b> <a rel="nofollow" class="external text" href="https://www.jstor.org/action/doBasicSearch?Query=%22SSE2%22&acc=on&wc=on">JSTOR</a></span></small></span> <span class="date-container"><i>(<span class="date">May 2013</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1251242444" /><table class="box-Context plainlinks metadata ambox ambox-style ambox-Context" role="presentation"><tbody><tr><td class="mbox-image"><div class="mbox-image-div"><span typeof="mw:File"><span><img alt="" src="//upload.wikimedia.org/wikipedia/en/thumb/f/f2/Edit-clear.svg/40px-Edit-clear.svg.png" decoding="async" width="40" height="40" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/en/thumb/f/f2/Edit-clear.svg/60px-Edit-clear.svg.png 1.5x, //upload.wikimedia.org/wikipedia/en/thumb/f/f2/Edit-clear.svg/80px-Edit-clear.svg.png 2x" data-file-width="48" data-file-height="48" /></span></span></div></td><td class="mbox-text"><div class="mbox-text-span">This article <b>provides insufficient context for those unfamiliar with the subject</b>.<span class="hide-when-compact"> Please help <a class="external text" href="https://en.wikipedia.org/w/index.php?title=SSE2&action=edit">improve the article</a> by <a href="/wiki/Wikipedia:Writing_better_articles#Provide_context_for_the_reader" title="Wikipedia:Writing better articles">providing more context for the reader</a>.</span> <span class="date-container"><i>(<span class="date">April 2023</span>)</i></span><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> </div> </div><span class="hide-when-compact"><i> (<small><a href="/wiki/Help:Maintenance_template_removal" title="Help:Maintenance template removal">Learn how and when to remove this message</a></small>)</i></span></div></td></tr></tbody></table> <p><b>SSE2</b> (<b>Streaming SIMD Extensions 2</b>) is one of the Intel <a href="/wiki/SIMD" class="mw-redirect" title="SIMD">SIMD</a> (Single Instruction, Multiple Data) <a href="/wiki/Processor_supplementary_instruction" class="mw-redirect" title="Processor supplementary instruction">processor supplementary instruction</a> sets introduced by <a href="/wiki/Intel" title="Intel">Intel</a> with the initial version of the <a href="/wiki/Pentium_4" title="Pentium 4">Pentium 4</a> in 2000. SSE2 instructions allow the use of XMM (SIMD) registers on x86 instruction set architecture processors. These registers can load up to 128 bits of data and perform instructions, such as vector addition and multiplication, simultaneously. </p><p>SSE2 introduced double-precision floating point instructions in addition to the single-precision floating point and integer instructions found in SSE. SSE2 extends earlier SSE instruction set by adding 144 new instructions to the previous 70 instructions. SSE2 intends to fully replace <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a>, a SIMD instruction set found on IA-32 architecture processors. Competing chip-maker <a href="/wiki/AMD" title="AMD">AMD</a> added support for SSE2 with the introduction of their <a href="/wiki/Opteron" title="Opteron">Opteron</a> and <a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a> ranges of <a href="/wiki/X86-64" title="X86-64">AMD64</a> 64-bit CPUs in 2003. </p><p>SSE2 was extended to create <a href="/wiki/SSE3" title="SSE3">SSE3</a> in 2004, and extended once again to create <a href="/wiki/SSE4" title="SSE4">SSE4</a> in 2006. </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Features">Features</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=1" title="Edit section: Features"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Most of the SSE2 instructions implement the integer vector operations also found in MMX. Instead of the MMX registers they use the XMM registers, which are wider and allow for significant performance improvements in specialized applications. Another advantage of replacing MMX with SSE2 is avoiding the mode switching penalty for issuing <a href="/wiki/X87" title="X87">x87</a> instructions present in MMX because it is sharing register space with the x87 FPU. The SSE2 also complements the floating-point vector operations of the SSE instruction set by adding support for the double precision data type. </p><p>Other SSE2 extensions include a set of <a href="/wiki/Cache_control_instruction" title="Cache control instruction">cache control instructions</a> intended primarily to minimize <a href="/wiki/Cache_pollution" title="Cache pollution">cache pollution</a> when processing infinite streams of information, and a sophisticated complement of numeric format conversion instructions. </p><p>AMD's implementation of SSE2 on the AMD64 (<a href="/wiki/X86-64" title="X86-64">x86-64</a>) platform includes an additional eight registers, doubling the total number to 16 (XMM0 through XMM15). These additional registers are only visible when running in 64-bit mode. Intel adopted these additional registers as part of their support for x86-64 architecture (or in Intel's parlance, "Intel 64") in 2004. </p> <div class="mw-heading mw-heading2"><h2 id="Differences_between_x87_FPU_and_SSE2">Differences between x87 FPU and SSE2</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=2" title="Edit section: Differences between x87 FPU and SSE2"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>FPU (x87) instructions provide higher precision by calculating intermediate results with 80 bits of precision, by default, to minimise <a href="/wiki/Roundoff_error" class="mw-redirect" title="Roundoff error">roundoff error</a> in numerically unstable algorithms (see <a href="/wiki/IEEE_754#Design_rationale" title="IEEE 754">IEEE 754 design rationale</a> and references therein). However, the x87 FPU is a scalar unit only whereas SSE2 can process a small vector of operands in parallel. </p><p>If code designed for x87 is ported to the lower precision double precision SSE2 floating point, certain combinations of math operations or input datasets can result in measurable numerical deviation, which can be an issue in reproducible scientific computations, e.g. if the calculation results must be compared against results generated from a different machine architecture. A related issue is that, historically, language standards and compilers had been inconsistent in their handling of the x87 80-bit registers implementing double extended precision variables, compared with the double and single precision formats implemented in SSE2: the rounding of extended precision intermediate values to double precision variables was not fully defined and was dependent on implementation details such as when registers were spilled to memory. </p> <div class="mw-heading mw-heading2"><h2 id="Differences_between_MMX_and_SSE2">Differences between MMX and SSE2</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=3" title="Edit section: Differences between MMX and SSE2"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SSE2 extends MMX instructions to operate on XMM registers. Therefore, it is possible to convert all existing MMX code to an SSE2 equivalent. Since an SSE2 register is twice as long as an MMX register, loop counters and memory access may need to be changed to accommodate this. However, 8 byte loads and stores to XMM are available, so this is not strictly required. </p><p>Although one SSE2 instruction can operate on twice as much data as an MMX instruction, performance might not increase significantly. Two major reasons are: accessing SSE2 data in memory not <a href="/wiki/Data_structure_alignment" title="Data structure alignment">aligned</a> to a 16-byte boundary can incur significant penalty, and the <a href="/wiki/Throughput" class="mw-redirect" title="Throughput">throughput</a> of SSE2 instructions in older <a href="/wiki/X86" title="X86">x86</a> implementations was half that for MMX instructions. <a href="/wiki/Intel" title="Intel">Intel</a> addressed the first problem by adding an instruction in <a href="/wiki/SSE3" title="SSE3">SSE3</a> to reduce the overhead of accessing unaligned data and improving the overall performance of misaligned loads, and the last problem by widening the execution engine in their <a href="/wiki/Core_(microarchitecture)" class="mw-redirect" title="Core (microarchitecture)">Core microarchitecture</a> in Core 2 Duo and later products. </p><p>Since MMX and x87 register files alias one another, using MMX will prevent x87 instructions from working as desired. Once MMX has been used, the programmer must use the emms instruction (C: _mm_empty()) to restore operation to the x87 register file. On some operating systems, x87 is not used very much, but may still be used in some critical areas like pow() where the extra precision is needed. In such cases, the corrupt floating-point state caused by failure to emit emms may go undetected for millions of instructions before ultimately causing the floating-point routine to fail, returning NaN. Since the problem is not locally apparent in the MMX code, finding and correcting the bug can be very time consuming. As SSE2 does not have this problem and it usually provides much better throughput and provides more registers in 64-bit code, it should be preferred for nearly all vectorization work. </p> <div class="mw-heading mw-heading2"><h2 id="Compiler_usage">Compiler usage</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=4" title="Edit section: Compiler usage"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>When introduced in 2000, SSE2 was not supported by software development tools. For example, to use SSE2 in a <a href="/wiki/Microsoft_Visual_Studio" class="mw-redirect" title="Microsoft Visual Studio">Microsoft Visual Studio</a> project, the programmer had to either manually write inline-assembly or import object-code from an external source. Later the Visual C++ Processor Pack added SSE2 support to <a href="/wiki/Visual_C%2B%2B" class="mw-redirect" title="Visual C++">Visual C++</a> and <a href="/wiki/MASM" class="mw-redirect" title="MASM">MASM</a>. </p><p>The <a href="/wiki/Intel_C%2B%2B_Compiler" title="Intel C++ Compiler">Intel C++ Compiler</a> can automatically generate <a href="/wiki/SSE4" title="SSE4">SSE4</a>, <a href="/wiki/SSSE3" title="SSSE3">SSSE3</a>, <a href="/wiki/SSE3" title="SSE3">SSE3</a>, SSE2, and SSE code without the use of hand-coded assembly. </p><p>Since GCC 3, <a href="/wiki/GNU_Compiler_Collection" title="GNU Compiler Collection">GCC</a> can automatically generate SSE/SSE2 scalar code when the target supports those instructions. <a href="/wiki/Automatic_vectorization" title="Automatic vectorization">Automatic vectorization</a> for SSE/SSE2 has been added since GCC 4. </p><p>The <a href="/wiki/Sun_Studio_Compiler_Suite" class="mw-redirect" title="Sun Studio Compiler Suite">Sun Studio Compiler Suite</a> can also generate SSE2 instructions when the compiler flag -xvector=simd is used. </p><p>Since <a href="/wiki/Microsoft_Visual_C%2B%2B" title="Microsoft Visual C++">Microsoft Visual C++</a> 2012, the compiler option to generate SSE2 instructions is turned on by default. </p> <div class="mw-heading mw-heading2"><h2 id="CPU_support">CPU support</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=5" title="Edit section: CPU support"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>SSE2 is an extension of the <a href="/wiki/IA-32" title="IA-32">IA-32</a> architecture, based on the <a href="/wiki/X86_instruction_set" class="mw-redirect" title="X86 instruction set">x86 instruction set</a>. Therefore, only x86 processors can include SSE2. The <a href="/wiki/AMD64" class="mw-redirect" title="AMD64">AMD64</a> architecture supports the <a href="/wiki/IA-32" title="IA-32">IA-32</a> as a compatibility mode and includes the SSE2 in its specification.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> It also doubles the number of XMM registers, allowing for better performance. SSE2 is also a requirement for installing Windows 8<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> (and later) or Microsoft Office 2013 (and later) "to enhance the reliability of third-party apps and drivers running in Windows 8".<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> </p><p>The following IA-32 CPUs support SSE2: </p> <ul><li><a href="/wiki/Intel" title="Intel">Intel</a> <a href="/wiki/NetBurst" title="NetBurst">NetBurst</a>-based CPUs (<a href="/wiki/Pentium_4" title="Pentium 4">Pentium 4</a>, <a href="/wiki/Xeon" title="Xeon">Xeon</a>, <a href="/wiki/Celeron" title="Celeron">Celeron</a>, <a href="/wiki/Pentium_D" title="Pentium D">Pentium D</a>, <a href="/wiki/Celeron_D" class="mw-redirect" title="Celeron D">Celeron D</a>)</li> <li>Intel <a href="/wiki/Pentium_M" title="Pentium M">Pentium M</a> and <a href="/wiki/Celeron_M" class="mw-redirect" title="Celeron M">Celeron M</a></li> <li><a href="/wiki/Intel_Atom" title="Intel Atom">Intel Atom</a></li> <li><a href="/wiki/AMD_Athlon_64" class="mw-redirect" title="AMD Athlon 64">AMD Athlon 64</a></li> <li><a href="/wiki/Transmeta_Efficeon" title="Transmeta Efficeon">Transmeta Efficeon</a></li> <li><a href="/wiki/VIA_C7" title="VIA C7">VIA C7</a></li></ul> <p>The following IA-32 CPUs were released after SSE2 was developed, but did not implement it: </p> <ul><li><a href="/wiki/AMD" title="AMD">AMD</a> CPUs prior to <a href="/wiki/Athlon_64" title="Athlon 64">Athlon 64</a>, such as <a href="/wiki/Athlon_XP" class="mw-redirect" title="Athlon XP">Athlon XP</a></li> <li><a href="/wiki/VIA_C3" title="VIA C3">VIA C3</a></li> <li><a href="/wiki/Transmeta_Crusoe" title="Transmeta Crusoe">Transmeta Crusoe</a></li> <li><a href="/wiki/Intel_Quark" title="Intel Quark">Intel Quark</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=6" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/X86_SIMD_instruction_listings#SSE2_instructions" title="X86 SIMD instruction listings">SSE2 instructions</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=SSE2&action=edit&section=7" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist 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(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite id="CITEREFMatzHubicka,_JanJaeger,_AndreasMitchell,_Mark2010" class="citation web cs1">Matz, Michael; Hubicka, Jan; Jaeger, Andreas; Mitchell, Mark (January 2010). <a rel="nofollow" class="external text" href="https://www.cs.washington.edu/education/courses/351/12wi/supp-docs/abi.pdf">"System V Application Binary Interface - AMD64 Architecture Processor Supplement - Draft Version 0.99.4"</a> <span class="cs1-format">(PDF)</span><span class="reference-accessdate">. Retrieved <span class="nowrap">April 26,</span> 2013</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=System+V+Application+Binary+Interface+-+AMD64+Architecture+Processor+Supplement+-+Draft+Version+0.99.4&rft.date=2010-01&rft.aulast=Matz&rft.aufirst=Michael&rft.au=Hubicka%2C+Jan&rft.au=Jaeger%2C+Andreas&rft.au=Mitchell%2C+Mark&rft_id=https%3A%2F%2Fwww.cs.washington.edu%2Feducation%2Fcourses%2F351%2F12wi%2Fsupp-docs%2Fabi.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASSE2" class="Z3988"></span><sup class="noprint Inline-Template"><span style="white-space: nowrap;">[<i><a href="/wiki/Wikipedia:Link_rot" title="Wikipedia:Link rot"><span title=" Dead link tagged December 2021">permanent dead link</span></a></i><span style="visibility:hidden; color:transparent; padding-left:2px">‍</span>]</span></sup></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite id="CITEREFFog" class="citation web cs1">Fog, Agner. <a rel="nofollow" class="external text" href="http://www.agner.org/optimize/optimizing_cpp.pdf">"Optimizing software in C++: An optimization guide for Windows, Linux and Mac platforms"</a> <span class="cs1-format">(PDF)</span>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20130408125402/http://www.agner.org/optimize/optimizing_cpp.pdf">Archived</a> <span class="cs1-format">(PDF)</span> from the original on April 8, 2013<span class="reference-accessdate">. Retrieved <span class="nowrap">April 26,</span> 2013</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Optimizing+software+in+C%2B%2B%3A+An+optimization+guide+for+Windows%2C+Linux+and+Mac+platforms&rft.aulast=Fog&rft.aufirst=Agner&rft_id=http%3A%2F%2Fwww.agner.org%2Foptimize%2Foptimizing_cpp.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3ASSE2" class="Z3988"></span></span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222" /><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://docs.microsoft.com/en-us/windows/desktop/dxmath/pg-xnamath-internals">"DirectXMath Programming Guide/Library Internals"</a>. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20190702024151/https://docs.microsoft.com/en-us/windows/desktop/dxmath/pg-xnamath-internals">Archived</a> from the original on July 2, 2019<span class="reference-accessdate">. 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href="/wiki/Power_ISA" title="Power ISA">Power ISA</a> <ul><li><a href="/wiki/AltiVec" title="AltiVec">VMX</a></li></ul></li> <li><a href="/wiki/SPARC" title="SPARC">SPARC</a> <ul><li><a href="/wiki/Visual_Instruction_Set" title="Visual Instruction Set">VIS</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Single_instruction,_multiple_data" title="Single instruction, multiple data">SIMD</a> (<a href="/wiki/X86" title="X86">x86</a>)</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a> (1996)</li> <li><a href="/wiki/3DNow!" title="3DNow!">3DNow!</a> (1998)</li> <li><a href="/wiki/Streaming_SIMD_Extensions" title="Streaming SIMD Extensions">SSE</a> (1999)</li> <li><a class="mw-selflink selflink">SSE2</a> (2001)</li> <li><a href="/wiki/SSE3" title="SSE3">SSE3</a> (2004)</li> <li><a href="/wiki/SSSE3" title="SSSE3">SSSE3</a> (2006)</li> <li><a href="/wiki/SSE4" title="SSE4">SSE4</a> (2006)</li> <li><a href="/wiki/SSE5" title="SSE5">SSE5</a> <s>(2007)</s></li> <li><a href="/wiki/Advanced_Vector_Extensions" title="Advanced Vector Extensions">AVX</a> (2008)</li> <li><a href="/wiki/F16C" title="F16C">F16C</a> (2009)</li> <li><a href="/wiki/XOP_instruction_set" title="XOP instruction set">XOP</a> (2009)</li> <li><a href="/wiki/FMA_instruction_set" title="FMA instruction set">FMA</a> (FMA4: 2011, FMA3: 2012)</li> <li><a href="/wiki/AVX2" class="mw-redirect" title="AVX2">AVX2</a> (2013)</li> <li><a href="/wiki/AVX-512" title="AVX-512">AVX-512</a> (2015)</li> <li><a href="/wiki/Advanced_Matrix_Extensions" title="Advanced Matrix Extensions">AMX</a> (2022)</li> <li><a href="/wiki/AVX10" class="mw-redirect" title="AVX10">AVX10</a> (2023)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Bit_manipulation" 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title="RISC-V">RVC</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Security and <a href="/wiki/Cryptographic_accelerator" title="Cryptographic accelerator">cryptography</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/VIA_PadLock" title="VIA PadLock">PadLock</a> (2003)</li> <li><a href="/wiki/AES_instruction_set" title="AES instruction set">AES-NI</a> (2008); ARMv8 also has AES instructions</li> <li><a href="/wiki/CLMUL_instruction_set" title="CLMUL instruction set">CLMUL</a> (2010)</li> <li><a href="/wiki/RDRAND" title="RDRAND">RDRAND</a> (2012)</li> <li><a href="/wiki/Intel_SHA_extensions" class="mw-redirect" title="Intel SHA extensions">SHA</a> (2013)</li> <li><a href="/wiki/Intel_MPX" title="Intel MPX">MPX</a> (2015)</li> <li><a href="/wiki/Software_Guard_Extensions" title="Software Guard Extensions">SGX</a> (2015)</li> <li><a href="/wiki/Trust_Domain_Extensions" title="Trust Domain Extensions">TDX</a> (2021)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Transactional_memory" title="Transactional memory">Transactional memory</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Transactional_Synchronization_Extensions" title="Transactional Synchronization Extensions">TSX</a> (2013)</li> <li><a href="/wiki/Advanced_Synchronization_Facility" title="Advanced Synchronization Facility">ASF</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Hardware-assisted_virtualization" class="mw-redirect" title="Hardware-assisted virtualization">Virtualization</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a 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