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class="vector-toc-list"> <li id="toc-Etymology" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Etymology"> <div class="vector-toc-text"> <span class="vector-toc-numb">1.1</span> <span>Etymology</span> </div> </a> <ul id="toc-Etymology-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Development" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Development"> <div class="vector-toc-text"> <span class="vector-toc-numb">2</span> <span>Development</span> </div> </a> <button aria-controls="toc-Development-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Development subsection</span> </button> <ul id="toc-Development-sublist" class="vector-toc-list"> <li id="toc-Improvements_over_the_i486" class="vector-toc-list-item vector-toc-level-2"> <a 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class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Cores and steppings subsection</span> </button> <ul id="toc-Cores_and_steppings-sublist" class="vector-toc-list"> <li id="toc-P5" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#P5"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.1</span> <span>P5</span> </div> </a> <ul id="toc-P5-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-P54C" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#P54C"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.2</span> <span>P54C</span> </div> </a> <ul id="toc-P54C-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-P54CQS" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#P54CQS"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.3</span> <span>P54CQS</span> </div> </a> <ul id="toc-P54CQS-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-P54CS" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#P54CS"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.4</span> <span>P54CS</span> </div> </a> <ul id="toc-P54CS-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-P24T" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#P24T"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.5</span> <span>P24T</span> </div> </a> <ul id="toc-P24T-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-P55C" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#P55C"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.6</span> <span>P55C</span> </div> </a> <ul id="toc-P55C-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Tillamook" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Tillamook"> <div class="vector-toc-text"> <span class="vector-toc-numb">3.7</span> <span>Tillamook</span> </div> </a> <ul id="toc-Tillamook-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-Models_and_variants" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Models_and_variants"> <div class="vector-toc-text"> <span class="vector-toc-numb">4</span> <span>Models and variants</span> </div> </a> <ul id="toc-Models_and_variants-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Competitors" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#Competitors"> <div class="vector-toc-text"> <span class="vector-toc-numb">5</span> <span>Competitors</span> </div> </a> <button aria-controls="toc-Competitors-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle Competitors subsection</span> </button> <ul id="toc-Competitors-sublist" class="vector-toc-list"> <li id="toc-List" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#List"> <div class="vector-toc-text"> <span class="vector-toc-numb">5.1</span> <span>List</span> </div> </a> <ul id="toc-List-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> <li id="toc-See_also" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#See_also"> <div class="vector-toc-text"> <span class="vector-toc-numb">6</span> <span>See also</span> </div> </a> <ul id="toc-See_also-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-References" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#References"> <div class="vector-toc-text"> <span class="vector-toc-numb">7</span> <span>References</span> </div> </a> <ul id="toc-References-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-External_links" class="vector-toc-list-item vector-toc-level-1 vector-toc-list-item-expanded"> <a class="vector-toc-link" href="#External_links"> <div class="vector-toc-text"> <span class="vector-toc-numb">8</span> <span>External links</span> </div> </a> <button aria-controls="toc-External_links-sublist" class="cdx-button cdx-button--weight-quiet cdx-button--icon-only vector-toc-toggle"> <span class="vector-icon mw-ui-icon-wikimedia-expand"></span> <span>Toggle External links subsection</span> </button> <ul id="toc-External_links-sublist" class="vector-toc-list"> <li id="toc-Intel_datasheets" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intel_datasheets"> <div class="vector-toc-text"> <span class="vector-toc-numb">8.1</span> <span>Intel datasheets</span> </div> </a> <ul id="toc-Intel_datasheets-sublist" class="vector-toc-list"> </ul> </li> <li id="toc-Intel_manuals" class="vector-toc-list-item vector-toc-level-2"> <a class="vector-toc-link" href="#Intel_manuals"> <div class="vector-toc-text"> <span class="vector-toc-numb">8.2</span> <span>Intel manuals</span> </div> </a> <ul id="toc-Intel_manuals-sublist" class="vector-toc-list"> </ul> </li> </ul> </li> </ul> </div> </div> </nav> </div> </div> <div class="mw-content-container"> <main id="content" class="mw-body"> <header class="mw-body-header vector-page-titlebar"> <nav aria-label="Contents" class="vector-toc-landmark"> <div id="vector-page-titlebar-toc" class="vector-dropdown vector-page-titlebar-toc vector-button-flush-left" > <input type="checkbox" id="vector-page-titlebar-toc-checkbox" role="button" aria-haspopup="true" data-event-name="ui.dropdown-vector-page-titlebar-toc" class="vector-dropdown-checkbox " aria-label="Toggle the table of contents" > <label id="vector-page-titlebar-toc-label" for="vector-page-titlebar-toc-checkbox" class="vector-dropdown-label cdx-button cdx-button--fake-button cdx-button--fake-button--enabled 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class="interlanguage-link-target"><span>Български</span></a></li><li class="interlanguage-link interwiki-ca mw-list-item"><a href="https://ca.wikipedia.org/wiki/Pentium_(original)" title="Pentium (original) – Catalan" lang="ca" hreflang="ca" data-title="Pentium (original)" data-language-autonym="Català" data-language-local-name="Catalan" class="interlanguage-link-target"><span>Català</span></a></li><li class="interlanguage-link interwiki-cs mw-list-item"><a href="https://cs.wikipedia.org/wiki/P5_(mikroarchitektura)" title="P5 (mikroarchitektura) – Czech" lang="cs" hreflang="cs" data-title="P5 (mikroarchitektura)" data-language-autonym="Čeština" data-language-local-name="Czech" class="interlanguage-link-target"><span>Čeština</span></a></li><li class="interlanguage-link interwiki-eo mw-list-item"><a href="https://eo.wikipedia.org/wiki/Pentium_P5" title="Pentium P5 – Esperanto" lang="eo" hreflang="eo" data-title="Pentium P5" data-language-autonym="Esperanto" data-language-local-name="Esperanto" class="interlanguage-link-target"><span>Esperanto</span></a></li><li class="interlanguage-link interwiki-fr mw-list-item"><a href="https://fr.wikipedia.org/wiki/Intel_Pentium" title="Intel Pentium – French" lang="fr" hreflang="fr" data-title="Intel Pentium" data-language-autonym="Français" data-language-local-name="French" class="interlanguage-link-target"><span>Français</span></a></li><li class="interlanguage-link interwiki-ko mw-list-item"><a href="https://ko.wikipedia.org/wiki/P5_(%EB%A7%88%EC%9D%B4%ED%81%AC%EB%A1%9C%EC%95%84%ED%82%A4%ED%85%8D%EC%B2%98)" title="P5 (마이크로아키텍처) – Korean" lang="ko" hreflang="ko" data-title="P5 (마이크로아키텍처)" data-language-autonym="한국어" data-language-local-name="Korean" class="interlanguage-link-target"><span>한국어</span></a></li><li class="interlanguage-link interwiki-ja mw-list-item"><a href="https://ja.wikipedia.org/wiki/Intel_Pentium_(1993%E5%B9%B4)" title="Intel Pentium (1993年) – Japanese" lang="ja" hreflang="ja" data-title="Intel Pentium (1993年)" data-language-autonym="日本語" data-language-local-name="Japanese" class="interlanguage-link-target"><span>日本語</span></a></li><li class="interlanguage-link interwiki-no mw-list-item"><a href="https://no.wikipedia.org/wiki/P5_(mikroarkitektur)" title="P5 (mikroarkitektur) – Norwegian Bokmål" lang="nb" hreflang="nb" data-title="P5 (mikroarkitektur)" data-language-autonym="Norsk bokmål" data-language-local-name="Norwegian Bokmål" class="interlanguage-link-target"><span>Norsk bokmål</span></a></li><li class="interlanguage-link interwiki-sk mw-list-item"><a href="https://sk.wikipedia.org/wiki/P5_(mikroarchitekt%C3%BAra)" title="P5 (mikroarchitektúra) – Slovak" lang="sk" hreflang="sk" data-title="P5 (mikroarchitektúra)" data-language-autonym="Slovenčina" data-language-local-name="Slovak" class="interlanguage-link-target"><span>Slovenčina</span></a></li><li class="interlanguage-link interwiki-th mw-list-item"><a href="https://th.wikipedia.org/wiki/%E0%B8%AD%E0%B8%B4%E0%B8%99%E0%B9%80%E0%B8%97%E0%B8%A5_P5" title="อินเทล P5 – Thai" lang="th" hreflang="th" data-title="อินเทล P5" data-language-autonym="ไทย" data-language-local-name="Thai" class="interlanguage-link-target"><span>ไทย</span></a></li><li class="interlanguage-link interwiki-zh mw-list-item"><a href="https://zh.wikipedia.org/wiki/%E5%A5%94%E8%85%BE_(%E5%88%9D%E4%BB%A3)" title="奔腾 (初代) – Chinese" lang="zh" hreflang="zh" data-title="奔腾 (初代)" data-language-autonym="中文" data-language-local-name="Chinese" class="interlanguage-link-target"><span>中文</span></a></li> </ul> <div class="after-portlet after-portlet-lang"><span class="wb-langlinks-edit wb-langlinks-link"><a href="https://www.wikidata.org/wiki/Special:EntityPage/Q12353724#sitelinks-wikipedia" title="Edit interlanguage links" class="wbc-editpage">Edit links</a></span></div> </div> </div> </div> </header> <div class="vector-page-toolbar"> <div class="vector-page-toolbar-container"> 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dir="ltr"><div class="shortdescription nomobile noexcerpt noprint searchaux" style="display:none">Intel microprocessor</div> <p class="mw-empty-elt"> </p> <style data-mw-deduplicate="TemplateStyles:r1257001546">.mw-parser-output .infobox-subbox{padding:0;border:none;margin:-3px;width:auto;min-width:100%;font-size:100%;clear:none;float:none;background-color:transparent}.mw-parser-output .infobox-3cols-child{margin:auto}.mw-parser-output .infobox .navbar{font-size:100%}@media screen{html.skin-theme-clientpref-night .mw-parser-output .infobox-full-data:not(.notheme)>div:not(.notheme)[style]{background:#1f1f23!important;color:#f8f9fa}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .infobox-full-data:not(.notheme) div:not(.notheme){background:#1f1f23!important;color:#f8f9fa}}@media(min-width:640px){body.skin--responsive .mw-parser-output .infobox-table{display:table!important}body.skin--responsive .mw-parser-output .infobox-table>caption{display:table-caption!important}body.skin--responsive .mw-parser-output .infobox-table>tbody{display:table-row-group}body.skin--responsive .mw-parser-output .infobox-table tr{display:table-row!important}body.skin--responsive .mw-parser-output .infobox-table th,body.skin--responsive .mw-parser-output .infobox-table td{padding-left:inherit;padding-right:inherit}}</style><table class="infobox"><caption class="infobox-title">Pentium (i586)</caption><tbody><tr><td colspan="2" class="infobox-image"><span typeof="mw:File"><a href="/wiki/File:Intel_Pentium_MMX_Processor_Logo.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d2/Intel_Pentium_MMX_Processor_Logo.svg/150px-Intel_Pentium_MMX_Processor_Logo.svg.png" decoding="async" width="150" height="192" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d2/Intel_Pentium_MMX_Processor_Logo.svg/225px-Intel_Pentium_MMX_Processor_Logo.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/d2/Intel_Pentium_MMX_Processor_Logo.svg/300px-Intel_Pentium_MMX_Processor_Logo.svg.png 2x" data-file-width="585" data-file-height="749" /></a></span></td></tr><tr><th colspan="2" class="infobox-header">General information</th></tr><tr><th scope="row" class="infobox-label">Launched</th><td class="infobox-data">March 22, 1993</td></tr><tr><th scope="row" class="infobox-label">Discontinued</th><td class="infobox-data">July 15, 1999<sup id="cite_ref-discontinued_1-0" class="reference"><a href="#cite_note-discontinued-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup class="noprint Inline-Template noprint noexcerpt Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:NOTRS" class="mw-redirect" title="Wikipedia:NOTRS"><span title="This claim needs references to better sources. (October 2019)">better source needed</span></a></i>]</sup></td></tr><tr><th scope="row" class="infobox-label">Marketed by</th><td class="infobox-data"><a href="/wiki/Intel" title="Intel">Intel</a></td></tr><tr><th scope="row" class="infobox-label">Designed by</th><td class="infobox-data">Intel</td></tr><tr><th scope="row" class="infobox-label">Common manufacturer</th><td class="infobox-data"><style data-mw-deduplicate="TemplateStyles:r1126788409">.mw-parser-output .plainlist ol,.mw-parser-output .plainlist ul{line-height:inherit;list-style:none;margin:0;padding:0}.mw-parser-output .plainlist ol li,.mw-parser-output .plainlist ul li{margin-bottom:0}</style><div class="plainlist"><ul><li>Intel</li></ul></div></td></tr><tr><th scope="row" class="infobox-label">Product code</th><td class="infobox-data">80501 (P5)<br />80502 (P45C, P54CQS, P54CS)<br />80503 (P55C, Tillamook)</td></tr><tr><th colspan="2" class="infobox-header">Performance</th></tr><tr><th scope="row" class="infobox-label">Max. <a href="/wiki/Central_processing_unit" title="Central processing unit">CPU</a> <a href="/wiki/Clock_rate" title="Clock rate">clock rate</a></th><td class="infobox-data">60-300 MHz</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Front-side_bus" title="Front-side bus">FSB</a> speeds</th><td class="infobox-data">50 MHz to 66 MHz</td></tr><tr><th colspan="2" class="infobox-header">Cache</th></tr><tr><th scope="row" class="infobox-label">L1 <a href="/wiki/CPU_cache" title="CPU cache">cache</a></th><td class="infobox-data">16–32 KiB</td></tr><tr><th scope="row" class="infobox-label">L2 cache</th><td class="infobox-data">Up to 512 KiB<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup></td></tr><tr><th colspan="2" class="infobox-header">Architecture and classification</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Technology_node" class="mw-redirect" title="Technology node">Technology node</a></th><td class="infobox-data">800 nm to 250 nm</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Microarchitecture" title="Microarchitecture">Microarchitecture</a></th><td class="infobox-data">P5</td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">Instruction set</a></th><td class="infobox-data"><a href="/wiki/X86-16" class="mw-redirect" title="X86-16">x86-16</a>, <a href="/wiki/IA-32" title="IA-32">IA-32</a></td></tr><tr><th scope="row" class="infobox-label">Extensions</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Physical specifications</th></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Transistor_count" title="Transistor count">Transistors</a></th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>3.1M <a href="/wiki/800_nm_process" title="800 nm process">800 nm</a> (P5)</li><li>3.2M <a href="/wiki/600_nm_process" title="600 nm process">600 nm</a> (P54C)</li><li>3.3M <a href="/wiki/350_nm_process" title="350 nm process">350 nm</a> (P54CS)</li><li>4.5M <a href="/wiki/350_nm_process" title="350 nm process">350 nm</a> (P55C)</li></ul></div></td></tr><tr><th scope="row" class="infobox-label"><a href="/wiki/Multi-core_processor" title="Multi-core processor">Cores</a></th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>1</li></ul></div></td></tr><tr><th scope="row" class="infobox-label">Sockets</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li><a href="/wiki/Socket_4" title="Socket 4">Socket 4</a></li><li><a href="/wiki/Socket_5" title="Socket 5">Socket 5</a></li><li><a href="/wiki/Socket_7" title="Socket 7">Socket 7</a></li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">Products, models, variants</th></tr><tr><th scope="row" class="infobox-label">Core names</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>P5</li><li>P54C</li><li>P54CQS</li><li>P54LM</li><li>P54CS</li><li>P55C</li><li>P55LM</li><li>Tillamook</li><li>P24T</li></ul></div></td></tr><tr><th scope="row" class="infobox-label">Models</th><td class="infobox-data"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1126788409"><div class="plainlist"><ul><li>Pentium</li><li><a href="/wiki/Pentium_OverDrive" title="Pentium OverDrive">Pentium OverDrive</a></li><li>Pentium MMX</li></ul></div></td></tr><tr><th colspan="2" class="infobox-header">History</th></tr><tr><th scope="row" class="infobox-label">Predecessor</th><td class="infobox-data"><a href="/wiki/I486" title="I486">i486</a></td></tr><tr><th scope="row" class="infobox-label">Successors</th><td class="infobox-data"><a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a>, <a href="/wiki/Pentium_II" title="Pentium II">Pentium II</a>, <a href="/wiki/Pentium_III" title="Pentium III">Pentium III</a> (SSE successor)</td></tr><tr><th colspan="2" class="infobox-header">Support status</th></tr><tr><td colspan="2" class="infobox-full-data">Unsupported</td></tr></tbody></table> <p>The <b>Pentium</b> (also referred to as the <b>i586</b> or <b>P5 Pentium</b>) is a <a href="/wiki/Microprocessor" title="Microprocessor">microprocessor</a> introduced by <a href="/wiki/Intel" title="Intel">Intel</a> on March 22, 1993. It is the first CPU using the <a href="/wiki/Pentium" title="Pentium">Pentium brand</a>.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> Considered the fifth generation in the <a href="/wiki/X86" title="X86">x86</a> (8086) compatible line of processors,<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup> succeeding the <a href="/wiki/I486" title="I486">i486</a>, its implementation and <a href="/wiki/Microarchitecture" title="Microarchitecture">microarchitecture</a> was internally called <i>P5</i>. </p><p>Like the Intel i486, the Pentium is instruction set compatible with the 32-bit <a href="/wiki/I386" title="I386">i386</a>. It uses a very similar microarchitecture to the i486, but was extended enough to implement a dual integer <a href="/wiki/Instruction_pipelining" title="Instruction pipelining">pipeline</a> design, as well as a more advanced <a href="/wiki/Floating-point_unit" title="Floating-point unit">floating-point unit</a> (FPU) that was noted to be ten times faster than its predecessor.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup> </p><p>The Pentium was succeeded by the <a href="/wiki/Pentium_Pro" title="Pentium Pro">Pentium Pro</a> in November 1995. In October 1996, the <b>Pentium MMX</b><sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> was introduced, complementing the same basic microarchitecture of the original Pentium with the <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX instruction set</a>, larger caches, and some other enhancements. Intel discontinued the P5 Pentium processors (sold as a cheaper product since the release of the <a href="/wiki/Pentium_II" title="Pentium II">Pentium II</a> in 1997) in early 2000 in favor of the <a href="/wiki/Celeron" title="Celeron">Celeron</a> processor, which had also replaced the 80486 brand.<sup id="cite_ref-discontinued_1-1" class="reference"><a href="#cite_note-discontinued-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> </p> <meta property="mw:PageProp/toc" /> <div class="mw-heading mw-heading2"><h2 id="Overview">Overview</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=1" title="Edit section: Overview"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The P5 Pentium is the first <a href="/wiki/Superscalar_processor" title="Superscalar processor">superscalar</a> <a href="/wiki/X86" title="X86">x86</a> processor, meaning it was often able to execute two instructions at the same time. Some techniques used to implement this were based on the earlier superscalar <a href="/wiki/Intel_i960" title="Intel i960">Intel i960</a> CA (1989), while other details were invented exclusively for the P5 design. Large parts were also copied from the i386 or i486, especially the strategies used to cope with the complicated x86 encodings in a pipelined fashion.<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> Just like the i486, the Pentium used both an optimized microcode system and RISC-like techniques, depending on the particular instruction, or part of instruction. The dual integer <a href="/wiki/Instruction_pipelining" title="Instruction pipelining">pipeline</a> design is something that had been argued being impossible to implement for a <a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a> instruction set, by certain academics and RISC competitors.<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Manual_of_Style/Words_to_watch#Unsupported_attributions" title="Wikipedia:Manual of Style/Words to watch"><span title="The material near this tag possibly uses too-vague attribution or weasel words. (March 2024)">who?</span></a></i>]</sup> </p><p>Other central features include a redesigned and significantly faster floating-point unit, a wide 64-bit <a href="/wiki/Bus_(computing)" title="Bus (computing)">data bus</a> (external as well as internal), separate code and <a href="/wiki/Data_cache" class="mw-redirect" title="Data cache">data caches</a>, and many other techniques and features to enhance performance. </p><p>The P5 also has better support for multiprocessing compared to the i486, and is the first x86 CPU with hardware support for it similar to IBM mainframe computers. Intel worked with IBM to define this ability and also designed it into the P5 microarchitecture. This ability was absent in prior x86 generations and x86 processors from competitors. </p><p>In order to employ the dual pipelines at their full potential, certain compilers were optimized to better exploit instruction level parallelism, although not all applications would substantially gain from being recompiled. The faster FPU always enhanced floating point performance significantly though, compared to the i486 or i387. Intel spent resources working with development tool vendors, <a href="/wiki/Independent_software_vendor" title="Independent software vendor">ISVs</a> and <a href="/wiki/Operating_system" title="Operating system">operating system</a> (OS) companies to optimize their products. </p> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_Pentium_A80501_66_SX950.JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/b3/Intel_Pentium_A80501_66_SX950.JPG/220px-Intel_Pentium_A80501_66_SX950.JPG" decoding="async" width="220" height="175" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/b3/Intel_Pentium_A80501_66_SX950.JPG/330px-Intel_Pentium_A80501_66_SX950.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/b3/Intel_Pentium_A80501_66_SX950.JPG/440px-Intel_Pentium_A80501_66_SX950.JPG 2x" data-file-width="2215" data-file-height="1759" /></a><figcaption>Intel Pentium A80501 <span class="nowrap">66 MHz</span> SX950 die image</figcaption></figure> <p>Competitors included the superscalar <a href="/wiki/PowerPC_601" class="mw-redirect" title="PowerPC 601">PowerPC 601</a> (1993), <a href="/wiki/SuperSPARC" title="SuperSPARC">SuperSPARC</a> (1992), <a href="/wiki/Alpha_21064" title="Alpha 21064">DEC Alpha 21064</a> (1992), <a href="/wiki/AMD_29000" class="mw-redirect" title="AMD 29000">AMD 29050</a> (1990), <a href="/wiki/Motorola_88000" title="Motorola 88000">Motorola MC88110</a> (1991) and <a href="/wiki/Motorola_68060" title="Motorola 68060">Motorola 68060</a> (1994), most of which also used a superscalar in-order dual instruction pipeline configuration, and the non-superscalar <a href="/wiki/Motorola_68040" title="Motorola 68040">Motorola 68040</a> (1990) and <a href="/wiki/R4000" title="R4000">MIPS R4000</a> (1991). </p> <div class="mw-heading mw-heading3"><h3 id="Etymology">Etymology</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=2" title="Edit section: Etymology"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The name "Pentium" is originally derived from the <a href="/wiki/Greek_language" title="Greek language">Greek</a> word <i><a href="https://en.wiktionary.org/wiki/pent-" class="extiw" title="wiktionary:pent-">pente</a></i> (<i>πεντε</i>), meaning "five", a reference to the prior numeric naming convention of Intel's 80x86 processors (8086–80486), with the <a href="/wiki/Latin" title="Latin">Latin</a> ending <i><a href="/wiki/-ium" class="mw-redirect" title="-ium">-ium</a></i> since the processor would otherwise have been named 80586 using that convention. </p> <div class="mw-heading mw-heading2"><h2 id="Development">Development</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=3" title="Edit section: Development"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The P5 microarchitecture was designed by the same Santa Clara team which designed the 386 and 486.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup> Design work started in 1989;<sup id="cite_ref-inside-intel_10-0" class="reference"><a href="#cite_note-inside-intel-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page: 88">: 88 </span></sup> the team decided to use a <a href="/wiki/Superscalar" class="mw-redirect" title="Superscalar">superscalar</a> RISC architecture which would be a convergence of RISC and CISC technology,<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> with on-chip cache, floating-point, and branch prediction. The preliminary design was first successfully simulated in 1990, followed by the <a href="/wiki/Integrated_circuit_layout" title="Integrated circuit layout">laying-out</a> of the design. By this time, the team had several dozen engineers. The design was <a href="/wiki/Tape-out" title="Tape-out">taped out</a>, or transferred to silicon, in April 1992, at which point beta-testing began.<sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> By mid-1992, the P5 team had 200 engineers.<sup id="cite_ref-inside-intel_10-1" class="reference"><a href="#cite_note-inside-intel-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page: 89">: 89 </span></sup> Intel at first planned to demonstrate the P5 in June 1992 at the trade show <a href="/w/index.php?title=PC_Expo&action=edit&redlink=1" class="new" title="PC Expo (page does not exist)">PC Expo</a>, and to formally announce the processor in September 1992,<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup> but design problems forced the demo to be cancelled, and the official introduction of the chip was delayed until the spring of 1993.<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> </p><p><a href="/wiki/John_H._Crawford" class="mw-redirect" title="John H. Crawford">John H. Crawford</a>, chief architect of the original 386, co-managed the design of the P5,<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> along with <a href="/w/index.php?title=Donald_Alpert&action=edit&redlink=1" class="new" title="Donald Alpert (page does not exist)">Donald Alpert</a>, who managed the architectural team. Dror Avnon managed the design of the FPU.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup> <a href="/wiki/Vinod_K._Dham" class="mw-redirect" title="Vinod K. Dham">Vinod K. Dham</a> was general manager of the P5 group.<sup id="cite_ref-inside-intel_10-2" class="reference"><a href="#cite_note-inside-intel-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Page: 90">: 90 </span></sup> </p><p>Intel's <a href="/wiki/Larrabee_(microarchitecture)" title="Larrabee (microarchitecture)">Larrabee</a> multicore architecture project uses a processor core derived from a P5 core (P54C), augmented by <a href="/wiki/Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">multithreading</a>, <a href="/wiki/Intel_64" class="mw-redirect" title="Intel 64">64-bit instructions</a>, and a 16-byte wide <a href="/wiki/Vector_processor" title="Vector processor">vector processing unit</a>.<sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> Intel's low-powered <a href="/wiki/Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell microarchitecture</a> employed in early <a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> processor cores also uses an in-order dual pipeline similar to P5.<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup> </p><p>Intel used the Pentium name instead of 586, because in 1991, it had lost a trademark dispute over the "386" trademark, when a judge ruled that the number was <a href="/wiki/Generic_trademark" title="Generic trademark">generic</a>. The company hired <a href="/wiki/Lexicon_Branding" title="Lexicon Branding">Lexicon Branding</a> to come up with a new, non-numeric name.<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="Improvements_over_the_i486">Improvements over the i486</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=4" title="Edit section: Improvements over the i486"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The P5 microarchitecture brings several important advances over the prior i486 architecture. </p> <ul><li><i>Performance</i>: <ul><li><a href="/wiki/Superscalar" class="mw-redirect" title="Superscalar">Superscalar</a> architecture – The Pentium has two datapaths (pipelines) that allow it to complete two instructions per clock cycle in many cases. The main pipe (U) can handle any instruction, while the other (V) can handle the most common simple instructions. Some<sup class="noprint Inline-Template" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Manual_of_Style/Words_to_watch#Unsupported_attributions" title="Wikipedia:Manual of Style/Words to watch"><span title="The material near this tag possibly uses too-vague attribution or weasel words. (July 2018)">who?</span></a></i>]</sup> <a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">reduced instruction set computer</a> (RISC) proponents had argued that the "complicated" x86 instruction set would probably never be implemented by a tightly pipelined <a href="/wiki/Microarchitecture" title="Microarchitecture">microarchitecture</a>, much less by a dual-pipeline design. The 486 and the Pentium demonstrated that this was indeed possible and feasible.</li> <li><a href="/wiki/64-bit" class="mw-redirect" title="64-bit">64-bit</a> external databus doubles the amount of information possible to read or write on each memory access and therefore allows the Pentium to load its code cache faster than the 80486; it also allows faster access and storage of 64-bit and 80-bit <a href="/wiki/X87" title="X87">x87</a> <a href="/wiki/Floating-point_unit" title="Floating-point unit">FPU</a> data.</li> <li>Separation of code and data caches lessens the fetch and operand read/write conflicts compared to the 486. To reduce access time and implementation cost, both of them are <a href="/wiki/Set-associative" class="mw-redirect" title="Set-associative">2-way associative</a>, instead of the single 4-way cache of the 486. A related enhancement in the Pentium is the ability to read a contiguous block from the code cache even when it is split between two cache lines (at least 17 bytes in worst case).</li> <li>Much faster <a href="/wiki/Floating-point_unit" title="Floating-point unit">floating-point unit</a>. Some instructions showed an enormous improvement, most notably FMUL, with up to 15 times higher throughput than in the 80486 FPU. The Pentium is also able to execute a FXCH ST(x) instruction in parallel with an ordinary (arithmetical or load/store) FPU instruction.</li> <li>Four-input address adders enables the Pentium to further reduce the address calculation latency compared to the 80486. The Pentium can calculate full addressing modes with <i>segment-base</i> + <i>base-register</i> + <i>scaled register</i> + <i>immediate offset</i> in a single cycle; the 486 has a three-input address adder only, and must therefore divide such calculations between two cycles.</li> <li>The <a href="/wiki/Microcode" title="Microcode">microcode</a> can employ both pipelines to enable auto-repeating instructions such as REP MOVSW perform one iteration every clock cycle, while the <a href="/wiki/80486" class="mw-redirect" title="80486">80486</a> needed three clocks per iteration (and the earliest x86 chips significantly more than the 486). Also, optimization of the access to the first microcode words during the decode stages helps in making several frequent instructions execute significantly more quickly, especially in their most common forms and in typical cases. Some examples are (486→Pentium, in clock cycles): CALL (3→1), RET (5→2), shifts/rotates (2–3→1).</li> <li>A faster, fully hardware-based multiplier makes instructions such as MUL and IMUL several times faster (and more predictable) than in the 80486; the execution time is reduced from 13 to 42 clock cycles down to 10–11 for 32-bit operands.</li> <li>Virtualized interrupt to speed up <a href="/wiki/Virtual_8086_mode" title="Virtual 8086 mode">virtual 8086 mode</a>.</li> <li>Branch prediction</li></ul></li> <li><i>Other features</i>: <ul><li>Enhanced debug features with the introduction of the Processor-based debug port (see <i>Pentium Processor Debugging</i> in the Developers Manual, Vol 1).</li> <li>Enhanced self-test features like the L1 cache parity check (see <i>Cache Structure</i> in the Developers Manual, Vol 1).</li> <li>New instructions: CPUID, CMPXCHG8B, RDTSC, RDMSR, WRMSR, RSM.</li> <li>Test registers TR0–TR7 and MOV instructions for access to them were eliminated.</li></ul></li> <li>The later Pentium MMX also added the <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX instruction set</a>, a basic integer <i>single instruction, multiple data</i> (<a href="/wiki/SIMD" class="mw-redirect" title="SIMD">SIMD</a>) instruction set extension marketed for use in <a href="/wiki/Multimedia" title="Multimedia">multimedia</a> applications. MMX could not be used simultaneously with the <a href="/wiki/X87" title="X87">x87</a> FPU instructions because the registers were reused (to allow fast context switches). More important enhancements were the doubling of the instruction and data cache sizes and a few microarchitectural changes for better performance.</li></ul> <p>The Pentium was designed to execute over 100 million <a href="/wiki/Instructions_per_second" title="Instructions per second">instructions per second</a> (MIPS),<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> and the 75 MHz model was able to reach 126.5 MIPS in certain benchmarks.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> The Pentium architecture typically offered just under twice the performance of a 486 processor per clock cycle in common benchmarks. The fastest 80486 parts (with slightly improved microarchitecture and 100 MHz operation) were almost as powerful as the first-generation Pentiums, and the <a href="/wiki/AMD" title="AMD">AMD</a> <a href="/wiki/Am5x86" title="Am5x86">Am5x86</a>, which despite its name is actually a 486-class CPU, was roughly equal to the Pentium 75 regarding pure ALU performance. </p> <div class="mw-heading mw-heading3"><h3 id="Errata">Errata</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=5" title="Edit section: Errata"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The early versions of 60–66 MHz P5 Pentiums had a problem in the floating-point unit that resulted in incorrect (but predictable) results from some division operations. This flaw, discovered in 1994 by professor Thomas Nicely at Lynchburg College, Virginia, became widely known as the <a href="/wiki/Pentium_FDIV_bug" title="Pentium FDIV bug">Pentium FDIV bug</a> and caused embarrassment for Intel, which created an exchange program to replace the faulty processors. </p><p>In 1997, another erratum was discovered that could allow a malicious program to crash a system without any special privileges, the "<a href="/wiki/Pentium_F00F_bug" title="Pentium F00F bug">F00F bug</a>". All P5 series processors were affected and no fixed steppings were ever released, however contemporary operating systems were patched with workarounds to prevent crashes. </p> <div class="mw-heading mw-heading2"><h2 id="Cores_and_steppings">Cores and steppings</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=6" title="Edit section: Cores and steppings"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The Pentium was Intel's primary microprocessor for personal computers during the mid-1990s. The original design was reimplemented in newer processes and new features were added to maintain its competitiveness, and to address specific markets such as portable computers. As a result, there were several variants of the P5 microarchitecture. </p> <div class="mw-heading mw-heading3"><h3 id="P5"><span class="anchor" id="P5"></span>P5</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=7" title="Edit section: P5"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_Pentium_arch.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/1/1a/Intel_Pentium_arch.svg/220px-Intel_Pentium_arch.svg.png" decoding="async" width="220" height="159" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/1a/Intel_Pentium_arch.svg/330px-Intel_Pentium_arch.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/1a/Intel_Pentium_arch.svg/440px-Intel_Pentium_arch.svg.png 2x" data-file-width="1116" data-file-height="807" /></a><figcaption>Intel Pentium microarchitecture</figcaption></figure> <p>The first Pentium microprocessor core was code-named "P5". Its product code was 80501 (80500 for the earliest <a href="/wiki/Stepping_level" title="Stepping level">steppings</a> Q0399). There were two versions, specified to operate at 60 MHz and 66 MHz respectively, using <a href="/wiki/Socket_4" title="Socket 4">Socket 4</a>. This first implementation of the Pentium was released using a 273-pin PGA form factor and ran on a 5v power supply. (descended from the usual <a href="/wiki/Transistor-transistor_logic" class="mw-redirect" title="Transistor-transistor logic">transistor-transistor logic</a> (TTL) compatibility requirements). It contained 3.1 million <a href="/wiki/Transistor" title="Transistor">transistors</a> and measured 16.7 mm by 17.6 mm for an area of 293.92 mm<sup>2</sup>.<sup id="cite_ref-MPR_1993-03-29_23-0" class="reference"><a href="#cite_note-MPR_1993-03-29-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> It was fabricated in a <a href="/wiki/800_nm_process" title="800 nm process">800 nm</a> bipolar complementary metal–oxide–semiconductor (<a href="/wiki/BiCMOS" title="BiCMOS">BiCMOS</a>) process.<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> The 5-volt design resulted in relatively high energy consumption for its operating frequency when compared to the directly following models. </p> <div class="mw-heading mw-heading3"><h3 id="P54C"><span class="anchor" id="P54C"></span>P54C</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=8" title="Edit section: P54C"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-default-size" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_Pentium_P54C_die.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/5a/Intel_Pentium_P54C_die.jpg/220px-Intel_Pentium_P54C_die.jpg" decoding="async" width="220" height="203" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/5a/Intel_Pentium_P54C_die.jpg/330px-Intel_Pentium_P54C_die.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/5/5a/Intel_Pentium_P54C_die.jpg/440px-Intel_Pentium_P54C_die.jpg 2x" data-file-width="3231" data-file-height="2980" /></a><figcaption>Intel Pentium P54C die shot</figcaption></figure> <p>The P5 was followed by the P54C (80502) in 1994, with versions specified to operate at 75, 90, or 100 MHz using a 3.3 volt power supply. Marking the switch to <a href="/wiki/Socket_5" title="Socket 5">Socket 5</a>, this was the first Pentium processor to operate at 3.3 volts, reducing energy consumption, but necessitating voltage regulation on mainboards. As with higher-clocked 486 processors, an internal clock multiplier was employed from here on to let the internal circuitry work at a higher frequency than the external address and data buses, as it is more complicated and cumbersome to increase the external frequency, due to physical constraints. It also allowed two-way multiprocessing, and had an integrated <a href="/wiki/Local_APIC" class="mw-redirect" title="Local APIC">local APIC</a> and new power management features. It contained 3.3 million transistors and measured 163 mm<sup>2</sup>.<sup id="cite_ref-MPR_1995-03-27_25-0" class="reference"><a href="#cite_note-MPR_1995-03-27-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> It was fabricated in a BiCMOS process which has been described as both 500 nm and <a href="/wiki/600_nm_process" title="600 nm process">600 nm</a> due to differing definitions.<sup id="cite_ref-MPR_1995-03-27_25-1" class="reference"><a href="#cite_note-MPR_1995-03-27-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="P54CQS">P54CQS</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=9" title="Edit section: P54CQS"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The P54C was followed by the P54CQS in early 1995, which operated at 120 MHz. It was fabricated in a <a href="/wiki/350_nm" class="mw-redirect" title="350 nm">350 nm</a> BiCMOS process and was the first commercial microprocessor to be fabricated in a 350 nm process.<sup id="cite_ref-MPR_1995-03-27_25-2" class="reference"><a href="#cite_note-MPR_1995-03-27-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> Its transistor count is identical to the P54C and, despite the newer process, it had an identical die area as well. The chip was connected to the package using <a href="/wiki/Wire_bonding" title="Wire bonding">wire bonding</a>, which only allows connections along the edges of the chip. A smaller chip would have required a redesign of the package, as there is a limit on the length of the wires and the edges of the chip would be further away from the pads on the package. The solution was to keep the chip the same size, retain the existing <a href="/w/index.php?title=Pad-ring&action=edit&redlink=1" class="new" title="Pad-ring (page does not exist)">pad-ring</a>, and only reduce the size of the Pentium's logic circuitry to enable it to achieve higher clock frequencies.<sup id="cite_ref-MPR_1995-03-27_25-3" class="reference"><a href="#cite_note-MPR_1995-03-27-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup> </p> <div class="mw-heading mw-heading3"><h3 id="P54CS"><span class="anchor" id="P54CS"></span>P54CS</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=10" title="Edit section: P54CS"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>The P54CQS was quickly followed by the P54CS, which operated at 133, 150, 166 and 200 MHz, and introduced <a href="/wiki/Socket_7" title="Socket 7">Socket 7</a>. It contained 3.3 million transistors, measured 90 mm<sup>2</sup> and was fabricated in a 350 nm BiCMOS process with four levels of interconnect. </p> <div class="mw-heading mw-heading3"><h3 id="P24T"><span class="anchor" id="P24T"></span>P24T</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=11" title="Edit section: P24T"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1236090951">.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}</style><div role="note" class="hatnote navigation-not-searchable">Further information: <a href="/wiki/Pentium_OverDrive" title="Pentium OverDrive">Pentium OverDrive</a></div> <p>The P24T <a href="/wiki/Pentium_OverDrive" title="Pentium OverDrive">Pentium OverDrive</a> for <a href="/wiki/Intel_80486" class="mw-redirect" title="Intel 80486">486</a> systems were released in 1995, which were based on 3.3 V 600 nm versions using a 63 or 83 MHz clock. Since these used <a href="/wiki/Socket_2" title="Socket 2">Socket 2</a>/<a href="/wiki/Socket_3" title="Socket 3">3</a>, some modifications had to be made to compensate for the 32-bit data bus and slower on-board L2 cache of 486 motherboards. They were therefore equipped with a 32 <a href="/wiki/Kilobyte" title="Kilobyte">KB</a> L1 cache (double that of pre-P55C Pentium CPUs). </p> <div class="mw-heading mw-heading3"><h3 id="P55C"><span class="anchor" id="P55C"></span><span class="anchor" id="MMX"></span>P55C</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=12" title="Edit section: P55C"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:Intel_Pentium_MMX_arch.svg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/6/6b/Intel_Pentium_MMX_arch.svg/150px-Intel_Pentium_MMX_arch.svg.png" decoding="async" width="150" height="100" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/6/6b/Intel_Pentium_MMX_arch.svg/225px-Intel_Pentium_MMX_arch.svg.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/6/6b/Intel_Pentium_MMX_arch.svg/300px-Intel_Pentium_MMX_arch.svg.png 2x" data-file-width="1215" data-file-height="807" /></a><figcaption>Intel Pentium MMX microarchitecture</figcaption></figure> <figure class="mw-halign-right" typeof="mw:File/Thumb"><a href="/wiki/File:P-MMX.JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/5/5b/P-MMX.JPG/150px-P-MMX.JPG" decoding="async" width="150" height="147" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/5/5b/P-MMX.JPG/225px-P-MMX.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/5/5b/P-MMX.JPG/300px-P-MMX.JPG 2x" data-file-width="2212" data-file-height="2167" /></a><figcaption>Pentium MMX 166 MHz without cover</figcaption></figure> <p>The P55C (or 80503) was developed by Intel's Research & Development Center in <a href="/wiki/Haifa" title="Haifa">Haifa, Israel</a>. It was sold as <b>Pentium with <a href="/wiki/MMX_(instruction_set)" title="MMX (instruction set)">MMX</a> Technology</b> (usually just called <b>Pentium MMX</b>); although it was based on the P5 core, it featured a new set of 57 "MMX" instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data. The Pentium MMX line was introduced on October 22, 1996, and released in January 1997.<sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup> </p><p>The new instructions worked on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer. So, for example, the PADDUSB (Packed ADD Unsigned Saturated Byte) instruction adds two vectors, each containing eight 8-bit unsigned integers together, elementwise; each addition that would <a href="/wiki/Arithmetic_overflow" class="mw-redirect" title="Arithmetic overflow">overflow</a> <a href="/wiki/Saturation_arithmetic" title="Saturation arithmetic"><i>saturates</i></a>, yielding 255, the maximal unsigned value that can be represented in a byte. These rather specialized instructions generally require special coding by the programmer for them to be used.<sup class="noprint Inline-Template Template-Fact" style="white-space:nowrap;">[<i><a href="/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"><span title="This claim needs references to reliable sources. (March 2021)">citation needed</span></a></i>]</sup> </p><p>Other changes to the core include a 6-stage pipeline (vs. 5 on P5) with a return stack (first done on Cyrix 6x86) and better parallelism, an improved instruction decoder, 16KB L1 data cache + 16KB L1 instruction cache with Both 4-way associativity (vs. 8KB L1 Data/instruction with 2-way on P5), 4 write buffers that could now be used by either pipeline (vs. one corresponding to each pipeline on P5) and an improved <a href="/wiki/Branch_predictor" title="Branch predictor">branch predictor</a> taken from the Pentium Pro,<sup id="cite_ref-OPTIMIZATIONMANUAL_27-0" class="reference"><a href="#cite_note-OPTIMIZATIONMANUAL-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup> with a 512-entry buffer (vs. 256 on P5).<sup id="cite_ref-MMXMANUAL_29-0" class="reference"><a href="#cite_note-MMXMANUAL-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup> </p><p>It contained 4.5 million transistors and had an area of 140 mm<sup>2</sup>. It was fabricated in a 280 nm CMOS process with the same metal pitches as the previous 350 nm BiCMOS process, so Intel described it as "350 nm" because of its similar transistor density.<sup id="cite_ref-MPR_1996-03-05_30-0" class="reference"><a href="#cite_note-MPR_1996-03-05-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> The process has four levels of interconnect.<sup id="cite_ref-MPR_1996-03-05_30-1" class="reference"><a href="#cite_note-MPR_1996-03-05-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> </p><p>While the P55C remained compatible with <a href="/wiki/Socket_7" title="Socket 7">Socket 7</a>, the voltage requirements for powering the chip differ from the standard Socket 7 specifications. Most motherboards manufactured for Socket 7 before the establishment of the P55C standard are not compliant with the dual voltage rail required for proper operation of this CPU (2.8 volt core voltage, 3.3 volt <a href="/wiki/Input/output" title="Input/output">input/output</a> (I/O) voltage). Intel addressed the issue with OverDrive upgrade kits that featured an interposer with its own voltage regulation. </p> <div class="mw-heading mw-heading3"><h3 id="Tillamook"><span class="anchor" id="Tillamook"></span>Tillamook</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=13" title="Edit section: Tillamook"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>Pentium MMX notebook CPUs used a <i>mobile module</i> that held the CPU. This module was a <a href="/wiki/Printed_circuit_board" title="Printed circuit board">printed circuit board</a> (PCB) with the CPU directly attached to it in a smaller form factor. The module snapped to the notebook motherboard, and typically a <a href="/wiki/Heat_spreader" title="Heat spreader">heat spreader</a> was installed and made contact with the module. However, with the 250 nm <i>Tillamook</i> Mobile Pentium MMX (named after a <a href="/wiki/Tillamook,_Oregon" title="Tillamook, Oregon">city in Oregon</a>), the module also held the <a href="/wiki/430TX" class="mw-redirect" title="430TX">430TX</a> chipset along with the system's 512 KB <a href="/wiki/Static_random-access_memory" title="Static random-access memory">static random-access memory</a> (SRAM) cache memory. </p> <div class="mw-heading mw-heading2"><h2 id="Models_and_variants">Models and variants</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=14" title="Edit section: Models and variants"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <table class="wikitable" style="font-size: 90%;"> <caption>Pentium and Pentium with MMX Technology </caption> <tbody><tr> <th> </th> <td colspan="2"><figure class="mw-halign-center" typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_P5.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/f/fd/KL_Intel_Pentium_P5.jpg/80px-KL_Intel_Pentium_P5.jpg" decoding="async" width="80" height="82" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/f/fd/KL_Intel_Pentium_P5.jpg/120px-KL_Intel_Pentium_P5.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/f/fd/KL_Intel_Pentium_P5.jpg/160px-KL_Intel_Pentium_P5.jpg 2x" data-file-width="1548" data-file-height="1578" /></a><figcaption></figcaption></figure> <figure class="mw-halign-center" typeof="mw:File"><a href="/wiki/File:Pentium_60_SX948_gold_front.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/dd/Pentium_60_SX948_gold_front.jpg/80px-Pentium_60_SX948_gold_front.jpg" decoding="async" width="80" height="77" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/dd/Pentium_60_SX948_gold_front.jpg/120px-Pentium_60_SX948_gold_front.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/dd/Pentium_60_SX948_gold_front.jpg/160px-Pentium_60_SX948_gold_front.jpg 2x" data-file-width="1640" data-file-height="1576" /></a><figcaption></figcaption></figure> </td> <td colspan="5" style="text-align: center"><span typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_75.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/c/c9/KL_Intel_Pentium_75.jpg/80px-KL_Intel_Pentium_75.jpg" decoding="async" width="80" height="85" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/c/c9/KL_Intel_Pentium_75.jpg/120px-KL_Intel_Pentium_75.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/c/c9/KL_Intel_Pentium_75.jpg/160px-KL_Intel_Pentium_75.jpg 2x" data-file-width="1389" data-file-height="1473" /></a></span> <span typeof="mw:File"><a href="/wiki/File:Pentium_Front.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d7/Pentium_Front.jpg/80px-Pentium_Front.jpg" decoding="async" width="80" height="79" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d7/Pentium_Front.jpg/120px-Pentium_Front.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/d7/Pentium_Front.jpg/160px-Pentium_Front.jpg 2x" data-file-width="2164" data-file-height="2140" /></a></span> <span typeof="mw:File"><a href="/wiki/File:Pentium_tt80502-75_sk089_observe.png" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/78/Pentium_tt80502-75_sk089_observe.png/80px-Pentium_tt80502-75_sk089_observe.png" decoding="async" width="80" height="78" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/78/Pentium_tt80502-75_sk089_observe.png/120px-Pentium_tt80502-75_sk089_observe.png 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/7/78/Pentium_tt80502-75_sk089_observe.png/160px-Pentium_tt80502-75_sk089_observe.png 2x" data-file-width="692" data-file-height="672" /></a></span> </td> <td colspan="4" style="text-align: center"><span typeof="mw:File"><a href="/wiki/File:Intel_Pentium_133.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/8/87/Intel_Pentium_133.jpg/80px-Intel_Pentium_133.jpg" decoding="async" width="80" height="75" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/8/87/Intel_Pentium_133.jpg/120px-Intel_Pentium_133.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/8/87/Intel_Pentium_133.jpg/160px-Intel_Pentium_133.jpg 2x" data-file-width="1300" data-file-height="1212" /></a></span> <span typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_P54C_200.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/b/b9/KL_Intel_Pentium_P54C_200.jpg/80px-KL_Intel_Pentium_P54C_200.jpg" decoding="async" width="80" height="83" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/b/b9/KL_Intel_Pentium_P54C_200.jpg/120px-KL_Intel_Pentium_P54C_200.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/b/b9/KL_Intel_Pentium_P54C_200.jpg/160px-KL_Intel_Pentium_P54C_200.jpg 2x" data-file-width="1347" data-file-height="1398" /></a></span> <span typeof="mw:File"><a href="/wiki/File:Ic-photo-Intel--TT80502133--(PP133)--(Mobile-Pentium-CPU).JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/d/d4/Ic-photo-Intel--TT80502133--%28PP133%29--%28Mobile-Pentium-CPU%29.JPG/80px-Ic-photo-Intel--TT80502133--%28PP133%29--%28Mobile-Pentium-CPU%29.JPG" decoding="async" width="80" height="81" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/d/d4/Ic-photo-Intel--TT80502133--%28PP133%29--%28Mobile-Pentium-CPU%29.JPG/120px-Ic-photo-Intel--TT80502133--%28PP133%29--%28Mobile-Pentium-CPU%29.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/d/d4/Ic-photo-Intel--TT80502133--%28PP133%29--%28Mobile-Pentium-CPU%29.JPG/160px-Ic-photo-Intel--TT80502133--%28PP133%29--%28Mobile-Pentium-CPU%29.JPG 2x" data-file-width="1000" data-file-height="1010" /></a></span> </td> <td colspan="6" style="text-align: center"><span typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_MMX.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/f/f0/KL_Intel_Pentium_MMX.jpg/80px-KL_Intel_Pentium_MMX.jpg" decoding="async" width="80" height="82" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/f/f0/KL_Intel_Pentium_MMX.jpg/120px-KL_Intel_Pentium_MMX.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/f/f0/KL_Intel_Pentium_MMX.jpg/160px-KL_Intel_Pentium_MMX.jpg 2x" data-file-width="1377" data-file-height="1413" /></a></span> <span typeof="mw:File"><a href="/wiki/File:Intel_Pentium_MMX_166_PGA_Front.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/1/18/Intel_Pentium_MMX_166_PGA_Front.jpg/80px-Intel_Pentium_MMX_166_PGA_Front.jpg" decoding="async" width="80" height="80" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/1/18/Intel_Pentium_MMX_166_PGA_Front.jpg/120px-Intel_Pentium_MMX_166_PGA_Front.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/1/18/Intel_Pentium_MMX_166_PGA_Front.jpg/160px-Intel_Pentium_MMX_166_PGA_Front.jpg 2x" data-file-width="650" data-file-height="649" /></a></span> <span typeof="mw:File"><a href="/wiki/File:Ic-photo-Intel--TT80503166--(Pentium-MMX-Mobile-CPU).JPG" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/f/f5/Ic-photo-Intel--TT80503166--%28Pentium-MMX-Mobile-CPU%29.JPG/80px-Ic-photo-Intel--TT80503166--%28Pentium-MMX-Mobile-CPU%29.JPG" decoding="async" width="80" height="81" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/f/f5/Ic-photo-Intel--TT80503166--%28Pentium-MMX-Mobile-CPU%29.JPG/120px-Ic-photo-Intel--TT80503166--%28Pentium-MMX-Mobile-CPU%29.JPG 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/f/f5/Ic-photo-Intel--TT80503166--%28Pentium-MMX-Mobile-CPU%29.JPG/160px-Ic-photo-Intel--TT80503166--%28Pentium-MMX-Mobile-CPU%29.JPG 2x" data-file-width="1000" data-file-height="1014" /></a></span> </td> <td colspan="5"><figure class="mw-halign-center" typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_Mobile.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/3/32/KL_Intel_Pentium_Mobile.jpg/80px-KL_Intel_Pentium_Mobile.jpg" decoding="async" width="80" height="71" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/3/32/KL_Intel_Pentium_Mobile.jpg/120px-KL_Intel_Pentium_Mobile.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/3/32/KL_Intel_Pentium_Mobile.jpg/160px-KL_Intel_Pentium_Mobile.jpg 2x" data-file-width="1698" data-file-height="1497" /></a><figcaption></figcaption></figure> </td></tr> <tr> <th>Code name </th> <td colspan="2">P5 </td> <td colspan="4">P54C </td> <td>P54C/P54CQS </td> <td colspan="4">P54CS </td> <td colspan="6">P55C </td> <td colspan="5"><i>Tillamook</i> </td></tr> <tr> <th>Product code </th> <td colspan="2">80501 </td> <td colspan="9">80502 </td> <td colspan="11">80503 </td></tr> <tr> <th>Process size </th> <td colspan="2">800 nm </td> <td colspan="5">600 nm or 350 nm* </td> <td colspan="4">350 nm </td> <td colspan="6">350 nm (later 280 nm) </td> <td colspan="5">250 nm </td></tr> <tr> <th>Die area (<a href="/wiki/Square_millimeter" class="mw-redirect" title="Square millimeter">mm<sup>2</sup></a>) </th> <td colspan="2">293.92 (16.7 x 17.6 mm) </td> <td colspan="5">148 @ 600 nm / 91 (later 83) @ 350 nm </td> <td colspan="4">91 (later 83) </td> <td colspan="6">141 @ 350 nm / 128 @ 280 nm </td> <td colspan="5">94.47 (9.06272 x 10.42416 mm) </td></tr> <tr> <th>Number of transistors (millions) </th> <td colspan="2">3.10 </td> <td colspan="5">3.20 </td> <td colspan="4">3.30 </td> <td colspan="11">4.50 </td></tr> <tr> <th>Socket </th> <td colspan="2">Socket 4 </td> <td colspan="5">Socket 5/7 </td> <td colspan="10">Socket 7 </td> <td colspan="5"> </td></tr> <tr> <th>Package </th> <td colspan="2"><a href="/wiki/Ceramic_pin_grid_array" class="mw-redirect" title="Ceramic pin grid array">CPGA</a>/CPGA+IHS </td> <td colspan="4">CPGA/CPGA+IHS/<a href="/wiki/Tape_Carrier_Package" class="mw-redirect" title="Tape Carrier Package">TCP</a>* </td> <td>CPGA/TCP* </td> <td colspan="2">CPGA/TCP* </td> <td>CPGA/<a href="/wiki/Pin_grid_array" title="Pin grid array">PPGA</a> </td> <td>PPGA </td> <td colspan="3">TCP* </td> <td colspan="2">CPGA/PPGA/TCP* </td> <td>PPGA/TCP* </td> <td colspan="5">TCP/TCP on <a href="/wiki/MMC-1" title="MMC-1">MMC-1</a> </td></tr> <tr> <th>Clock speed (<a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a>) </th> <td>60 </td> <td>66 </td> <td>75 </td> <td>90 </td> <td colspan="2">100 </td> <td>120 </td> <td>133 </td> <td>150 </td> <td>166 </td> <td>200 </td> <td>120* </td> <td>133* </td> <td>150* </td> <td>166 </td> <td>200 </td> <td>233 </td> <td>166 </td> <td>200 </td> <td>233 </td> <td>266 </td> <td>300 </td></tr> <tr> <th>Bus speed (<a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a>) </th> <td>60 </td> <td>66 </td> <td>50 </td> <td>60 </td> <td>50 </td> <td>66 </td> <td>60 </td> <td>66 </td> <td>60 </td> <td colspan="2">66 </td> <td>60 </td> <td>66 </td> <td>60 </td> <td colspan="8">66 </td></tr> <tr> <th>Level 1 Cache Size </th> <td colspan="11">8 KB 2-way set associative code cache. 8 KB 2-way set associative write-back data cache </td> <td colspan="11">16 KB 4-way set associative code cache. 16 KB 4-way set associative write-back data cache </td></tr> <tr> <th>Core Voltage </th> <td>5.0 </td> <td>5.15 </td> <td>3.3 2,9* </td> <td>3.3 2.9* </td> <td colspan="2">3.3 3.1* 2.9* </td> <td>3.3 3.1* 2.9* </td> <td>3.3 3.1* 2.9* </td> <td>3.3 3.1* 2.9* </td> <td>3.3 </td> <td>3.3 </td> <td>2.2* </td> <td>2.45* </td> <td>2.45* </td> <td>2.8 2.45* </td> <td>2.8 </td> <td>2.8 </td> <td>1.9 1.8* </td> <td>1.8* </td> <td>1.8* </td> <td>1.9 2.0* </td> <td>2.0* </td></tr> <tr> <th>I/O Voltage </th> <td>5.0 </td> <td>5.15 </td> <td>3.3 </td> <td>3.3 </td> <td colspan="2">3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>3.3 </td> <td>2.5 </td> <td>2.5 </td> <td>2.5 </td> <td>2.5 </td> <td>2.5 </td></tr> <tr> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a> (max. W) </th> <td>14.6 (15.3) </td> <td>16.0 (17.3) </td> <td>8.0 (9.5) 6.0* (7.3*) </td> <td>9.0 (10.6) 7.3* (8.8*) </td> <td colspan="2">10.1 (11.7) 8.0 at 600nm* (9.8 at 600nm*) 5.9 at 35Onm* (7.6 at 350nm*) </td> <td>12.8 (13.4) 7.1* (8.8*) </td> <td>11.2 (12.2) 7.9* (9.8*) </td> <td>11.6 (13.9) 10.0* (12.0*) </td> <td>14.5 (15.3) </td> <td>15.5 (16.6) </td> <td>4.2* </td> <td>7.8* (11.8*) </td> <td>8.6* (12.7*) </td> <td>13.1 (15.7) 9.0* (13.7*) </td> <td>15.7 (18.9) </td> <td>17.0 (21.5) </td> <td>4.5 (7.4) 4.1* (5.4*) </td> <td>5.0* (6.1*) </td> <td>5.5* (7.0*) </td> <td>7.6 (9.2) 7.6* (9.6*) </td> <td>8.0* </td></tr> <tr> <th>Introduced </th> <td colspan="2">1993-03-22 </td> <td>1994-10-10 </td> <td colspan="3">1994-03-07 </td> <td>1995-03-27 </td> <td>1995-06-12 </td> <td colspan="2">1996-01-04 </td> <td>1996-06-10 </td> <td>1996-10-20 </td> <td>1997-05-19 </td> <td colspan="3">1997-01-08 </td> <td>1997-06-02 </td> <td colspan="3">1997-08 </td> <td>1998-01 </td> <td>1999-01 </td></tr> <tr> <td colspan="23"><i>* An asterisk indicates that these were only available as Mobile Pentium or Mobile Pentium MMX chips for <a href="/wiki/Laptop" title="Laptop">laptops</a>.</i> </td></tr></tbody></table> <table class="wikitable"> <caption>Pentium OverDrive with MMX Technology </caption> <tbody><tr> <th> </th> <td colspan="7"><figure class="mw-halign-center" typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_MMX_Overdrive_A.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/2/21/KL_Intel_Pentium_MMX_Overdrive_A.jpg/80px-KL_Intel_Pentium_MMX_Overdrive_A.jpg" decoding="async" width="80" height="80" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/2/21/KL_Intel_Pentium_MMX_Overdrive_A.jpg/120px-KL_Intel_Pentium_MMX_Overdrive_A.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/2/21/KL_Intel_Pentium_MMX_Overdrive_A.jpg/160px-KL_Intel_Pentium_MMX_Overdrive_A.jpg 2x" data-file-width="1700" data-file-height="1700" /></a><figcaption></figcaption></figure> </td></tr> <tr> <th>Code name </th> <td colspan="6">P54CTB </td></tr> <tr> <th>Product code </th> <td colspan="2">PODPMT60X150 </td> <td>PODPMT66X166 </td> <td colspan="2">PODPMT60X180 </td> <td>PODPMT66X200 </td></tr> <tr> <th>Process size (nm) </th> <td colspan="7">350 </td></tr> <tr> <th>Socket </th> <td colspan="6">Socket 5/7 </td></tr> <tr> <th>Package </th> <td colspan="6"><a href="/wiki/Ceramic_pin_grid_array" class="mw-redirect" title="Ceramic pin grid array">CPGA</a> with heatsink, fan and voltage regulator </td></tr> <tr> <th>Clock speed (MHz) </th> <td>125 </td> <td>150 </td> <td>166 </td> <td>150 </td> <td>180 </td> <td>200 </td></tr> <tr> <th>Bus speed (MHz) </th> <td>50 </td> <td>60 </td> <td>66 </td> <td>50 </td> <td>60 </td> <td>66 </td></tr> <tr> <th>Upgrade for </th> <td>Pentium 75 </td> <td>Pentium 90 </td> <td>Pentium 100 and 133 </td> <td>Pentium 75 </td> <td>Pentium 90, 120 and 150 </td> <td>Pentium 100, 133 and 166 </td></tr> <tr> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a> (max. W) </th> <td colspan="2">15.6 </td> <td>15.6 </td> <td colspan="2">15.6 </td> <td>18 </td></tr> <tr> <th>Voltage </th> <td colspan="2">3.3 </td> <td>3.3 </td> <td colspan="2">3.3 </td> <td>3.3 </td></tr></tbody></table> <table class="wikitable"> <caption>Embedded versions of Pentium with MMX Technology </caption> <tbody><tr> <th> </th> <td colspan="4"><figure class="mw-halign-center" typeof="mw:File"><a href="/wiki/File:KL_Intel_Pentium_MMX_embedded_Top.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/c/c6/KL_Intel_Pentium_MMX_embedded_Top.jpg/80px-KL_Intel_Pentium_MMX_embedded_Top.jpg" decoding="async" width="80" height="81" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/c/c6/KL_Intel_Pentium_MMX_embedded_Top.jpg/120px-KL_Intel_Pentium_MMX_embedded_Top.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/c/c6/KL_Intel_Pentium_MMX_embedded_Top.jpg/160px-KL_Intel_Pentium_MMX_embedded_Top.jpg 2x" data-file-width="1110" data-file-height="1119" /></a><figcaption></figcaption></figure> </td> <td colspan="3"><figure class="mw-halign-center" typeof="mw:File"><a href="/wiki/File:KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg" class="mw-file-description"><img src="//upload.wikimedia.org/wikipedia/commons/thumb/7/7c/KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg/80px-KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg" decoding="async" width="80" height="80" class="mw-file-element" srcset="//upload.wikimedia.org/wikipedia/commons/thumb/7/7c/KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg/120px-KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg 1.5x, //upload.wikimedia.org/wikipedia/commons/thumb/7/7c/KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg/160px-KL_Intel_Embedded_Pentium_MMX_PGA_Bottom.jpg 2x" data-file-width="1488" data-file-height="1491" /></a><figcaption></figcaption></figure> </td></tr> <tr> <th>Code name </th> <td colspan="2">P55C </td> <td colspan="5"><i>Tillamook</i> </td></tr> <tr> <th>Product code </th> <td>FV8050366200 </td> <td>FV8050366233 </td> <td>FV80503CSM66166 </td> <td>GC80503CSM66166 </td> <td>GC80503CS166EXT </td> <td>FV80503CSM66266 </td> <td>GC80503CSM66266 </td></tr> <tr> <th>Process size (<a href="/wiki/Nanometer" class="mw-redirect" title="Nanometer">nm</a>) </th> <td colspan="2">350 </td> <td colspan="5">250 </td></tr> <tr> <th>Clock speed (<a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a>) </th> <td>200 </td> <td>233 </td> <td>166 </td> <td>166 </td> <td>166 </td> <td>266 </td> <td>266 </td></tr> <tr> <th>Bus speed (<a href="/wiki/Megahertz" class="mw-redirect" title="Megahertz">MHz</a>) </th> <td>66 </td> <td>66 </td> <td>66 </td> <td>66 </td> <td>66 </td> <td>66 </td> <td>66 </td></tr> <tr> <th>Package </th> <td><a href="/wiki/Pin_grid_array" title="Pin grid array">PPGA</a> </td> <td>PPGA </td> <td>PPGA </td> <td><a href="/wiki/Ball_grid_array" title="Ball grid array">BGA</a> </td> <td>BGA </td> <td>PPGA </td> <td>BGA </td></tr> <tr> <th><a href="/wiki/Thermal_design_power" title="Thermal design power">TDP</a> (max. W) </th> <td>15.7 </td> <td>17 </td> <td>4.5 </td> <td>4.1 </td> <td>4.1 </td> <td>7.6 </td> <td>7.6 </td></tr> <tr> <th>Voltage </th> <td>2.8 </td> <td>2.8 </td> <td>1.9 </td> <td>1.8 </td> <td>1.8 </td> <td>1.9 </td> <td>2.0 </td></tr></tbody></table> <div class="mw-heading mw-heading2"><h2 id="Competitors">Competitors</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=15" title="Edit section: Competitors"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>After the introduction of the Pentium, competitors such as <a href="/wiki/NexGen" title="NexGen">NexGen</a>,<sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup> AMD, <a href="/wiki/Cyrix" title="Cyrix">Cyrix</a>, and <a href="/wiki/Texas_Instruments" title="Texas Instruments">Texas Instruments</a> announced Pentium-compatible processors in 1994.<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> <i><a href="/wiki/CIO_magazine" class="mw-redirect" title="CIO magazine">CIO magazine</a></i> identified NexGen's Nx586 as the first Pentium-compatible CPU,<sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup> while <i><a href="/wiki/PC_Magazine" class="mw-redirect" title="PC Magazine">PC Magazine</a></i> described the <a href="/wiki/Cyrix_6x86" title="Cyrix 6x86">Cyrix 6x86</a> as the first. These were followed by the <a href="/wiki/AMD_K5" title="AMD K5">AMD K5</a>, which was delayed due to design difficulties. AMD later bought NexGen to help design the <a href="/wiki/AMD_K6" title="AMD K6">AMD K6</a>, and Cyrix was bought by <a href="/wiki/National_Semiconductor" title="National Semiconductor">National Semiconductor</a>.<sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> Later processors from AMD and Intel retain compatibility with the original Pentium. </p> <div class="mw-heading mw-heading3"><h3 id="List">List</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=16" title="Edit section: List"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/AMD_K5" title="AMD K5">AMD K5</a>, <a href="/wiki/AMD_K6" title="AMD K6">AMD K6</a></li> <li><a href="/wiki/Cyrix_6x86" title="Cyrix 6x86">Cyrix 6x86</a></li> <li><a href="/wiki/WinChip" title="WinChip">WinChip</a> C6</li> <li>NexGen <a href="/wiki/Nx586" class="mw-redirect" title="Nx586">Nx586</a></li> <li>Rise <a href="/wiki/MP6" title="MP6">mP6</a></li></ul> <div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=17" title="Edit section: See also"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">List of Intel CPU microarchitectures</a></li> <li><a href="/wiki/List_of_Intel_Pentium_processors" title="List of Intel Pentium processors">List of Intel Pentium processors</a></li> <li><a href="/wiki/Cache_on_a_stick" title="Cache on a stick">Cache on a stick</a> (COASt), L2 cache modules for Pentium</li> <li><a href="/wiki/IA-32" title="IA-32">IA-32</a> <a href="/wiki/Instruction_set_architecture" title="Instruction set architecture">instruction set architecture</a> (ISA)</li> <li><a href="/wiki/Intel_82497" title="Intel 82497">Intel 82497</a> cache controller</li></ul> <div class="mw-heading mw-heading2"><h2 id="References">References</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=18" title="Edit section: References"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <style data-mw-deduplicate="TemplateStyles:r1239543626">.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}</style><div class="reflist"> <div class="mw-references-wrap mw-references-columns"><ol class="references"> <li id="cite_note-discontinued-1"><span class="mw-cite-backlink">^ <a href="#cite_ref-discontinued_1-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-discontinued_1-1"><sup><i><b>b</b></i></sup></a></span> <span class="reference-text"><style data-mw-deduplicate="TemplateStyles:r1238218222">.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("//upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("//upload.wikimedia.org/wikipedia/commons/d/d6/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("//upload.wikimedia.org/wikipedia/commons/a/aa/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("//upload.wikimedia.org/wikipedia/commons/4/4c/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20000127045353/http://developer.intel.com/design/pcn/Processors/D0000777.pdf">"Product Change Notification #777"</a> <span class="cs1-format">(PDF)</span>. Intel. February 9, 1999. Archived from <a rel="nofollow" class="external text" href="http://developer.intel.com/design/pcn/Processors/D0000777.pdf">the original</a> <span class="cs1-format">(PDF)</span> on January 27, 2000<span class="reference-accessdate">. Retrieved <span class="nowrap">October 14,</span> 2019</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Product+Change+Notification+%23777&rft.pub=Intel&rft.date=1999-02-09&rft_id=http%3A%2F%2Fdeveloper.intel.com%2Fdesign%2Fpcn%2FProcessors%2FD0000777.pdf&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.intel.com/content/www/us/en/products/sku/49966/intel-pentium-processor-with-mmx-technology-200-mhz-66-mhz-fsb/specifications.html">"Intel® Pentium® Processor with MMX™ Technology 200 MHZ, 66 MHZ FSB - Product Specifications"</a>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=unknown&rft.btitle=Intel%C2%AE+Pentium%C2%AE+Processor+with+MMX%E2%84%A2+Technology+200+MHZ%2C+66+MHZ+FSB+-+Product+Specifications&rft_id=https%3A%2F%2Fwww.intel.com%2Fcontent%2Fwww%2Fus%2Fen%2Fproducts%2Fsku%2F49966%2Fintel-pentium-processor-with-mmx-technology-200-mhz-66-mhz-fsb%2Fspecifications.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="http://www.intel.com/pressroom/kits/quickrefyr.htm#1993"><i>View Processors Chronologically by Date of Introduction</i></a>, Intel<span class="reference-accessdate">, retrieved <span class="nowrap">August 14,</span> 2007</span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=View+Processors+Chronologically+by+Date+of+Introduction&rft.pub=Intel&rft_id=http%3A%2F%2Fwww.intel.com%2Fpressroom%2Fkits%2Fquickrefyr.htm%231993&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite class="citation cs2"><a rel="nofollow" class="external text" href="http://www.intel.com/pressroom/kits/quickreffam.htm#pentium"><i>Intel Pentium Processor Family</i></a>, Intel<span class="reference-accessdate">, retrieved <span class="nowrap">August 14,</span> 2007</span></cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.btitle=Intel+Pentium+Processor+Family&rft.pub=Intel&rft_id=http%3A%2F%2Fwww.intel.com%2Fpressroom%2Fkits%2Fquickreffam.htm%23pentium&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text">I.e. 8086/88, 186/286, 386, 486, P5</span> </li> <li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFMichael_Justin_Allen_Sexton2018" class="citation web cs1">Michael Justin Allen Sexton (September 8, 2018). <a rel="nofollow" class="external text" href="https://www.tomshardware.com/picturestory/710-history-of-intel-cpus.html">"The History Of Intel CPUs: Updated!"</a>. <i>Tom's Hardware</i><span class="reference-accessdate">. Retrieved <span class="nowrap">November 20,</span> 2024</span>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=unknown&rft.jtitle=Tom%27s+Hardware&rft.atitle=The+History+Of+Intel+CPUs%3A+Updated%21&rft.date=2018-09-08&rft.au=Michael+Justin+Allen+Sexton&rft_id=https%3A%2F%2Fwww.tomshardware.com%2Fpicturestory%2F710-history-of-intel-cpus.html&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text">officially known as <i>Pentium with MMX Technology</i></span> </li> <li id="cite_note-8"><span class="mw-cite-backlink"><b><a href="#cite_ref-8">^</a></b></span> <span class="reference-text">as compared to a simple RISC processor like the i960.</span> </li> <li id="cite_note-9"><span class="mw-cite-backlink"><b><a href="#cite_ref-9">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFColwell2006" class="citation book cs1"><a href="/wiki/Bob_Colwell" title="Bob Colwell">Colwell, Robert P.</a> (2006). <i>The Pentium Chronicles: The People, Passion, and Politics Behind Intel's Landmark Chips</i>. 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"Intel's Long-Awaited P55C Disclosed". <i><a href="/wiki/Microprocessor_Report" title="Microprocessor Report">Microprocessor Report</a></i>.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=Microprocessor+Report&rft.atitle=Intel%27s+Long-Awaited+P55C+Disclosed&rft.date=1996-03-05&rft.aulast=Slater&rft.aufirst=Michael&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-31"><span class="mw-cite-backlink"><b><a href="#cite_ref-31">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFCorcoranCrothers1994" class="citation journal cs1">Corcoran, Cate; Crothers, Brooke (July 11, 1994). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=ljgEAAAAMBAJ&pg=PA5">"NexGen to Beat Intel's Chip Prices"</a>. <i><a href="/wiki/InfoWorld" title="InfoWorld">InfoWorld</a></i>. <a href="/wiki/International_Data_Group" title="International Data Group">IDG</a>: 5.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=InfoWorld&rft.atitle=NexGen+to+Beat+Intel%27s+Chip+Prices&rft.pages=5&rft.date=1994-07-11&rft.aulast=Corcoran&rft.aufirst=Cate&rft.au=Crothers%2C+Brooke&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DljgEAAAAMBAJ%26pg%3DPA5&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-32"><span class="mw-cite-backlink"><b><a href="#cite_ref-32">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFBarr1994" class="citation journal cs1">Barr, Christopher (January 11, 1994). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=E9TvMcu1mIwC&pg=PA29">"Pentium Killers"</a>. <i><a href="/wiki/PC_Magazine" class="mw-redirect" title="PC Magazine">PC Magazine</a></i>. <b>13</b> (1). <a href="/wiki/Ziff_Davis" title="Ziff Davis">Ziff Davis</a>: 29.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=PC+Magazine&rft.atitle=Pentium+Killers&rft.volume=13&rft.issue=1&rft.pages=29&rft.date=1994-01-11&rft.aulast=Barr&rft.aufirst=Christopher&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DE9TvMcu1mIwC%26pg%3DPA29&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-33"><span class="mw-cite-backlink"><b><a href="#cite_ref-33">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFEdwards1995" class="citation journal cs1">Edwards, John (June 15, 1995). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=aAYAAAAAMBAJ&pg=PA72">"In the Chips"</a>. <i><a href="/wiki/CIO_magazine" class="mw-redirect" title="CIO magazine">CIO magazine</a></i>. <b>8</b> (17). <a href="/wiki/International_Data_Group" title="International Data Group">IDG</a>: 72–76.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=CIO+magazine&rft.atitle=In+the+Chips&rft.volume=8&rft.issue=17&rft.pages=72-76&rft.date=1995-06-15&rft.aulast=Edwards&rft.aufirst=John&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3DaAYAAAAAMBAJ%26pg%3DPA72&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> <li id="cite_note-34"><span class="mw-cite-backlink"><b><a href="#cite_ref-34">^</a></b></span> <span class="reference-text"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1238218222"><cite id="CITEREFSlater1997" class="citation journal cs1">Slater, Michael (September 23, 1997). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=rm500_oURScC&pg=PA122">"The CPU for Your Next PC"</a>. <i><a href="/wiki/PC_Magazine" class="mw-redirect" title="PC Magazine">PC Magazine</a></i>. <b>16</b> (16). <a href="/wiki/Ziff_Davis" title="Ziff Davis">Ziff Davis</a>: 130–133.</cite><span title="ctx_ver=Z39.88-2004&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.jtitle=PC+Magazine&rft.atitle=The+CPU+for+Your+Next+PC&rft.volume=16&rft.issue=16&rft.pages=130-133&rft.date=1997-09-23&rft.aulast=Slater&rft.aufirst=Michael&rft_id=https%3A%2F%2Fbooks.google.com%2Fbooks%3Fid%3Drm500_oURScC%26pg%3DPA122&rfr_id=info%3Asid%2Fen.wikipedia.org%3APentium+%28original%29" class="Z3988"></span></span> </li> </ol></div></div> <div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=19" title="Edit section: External links"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://www.cpu-collection.de/?tn=0&l0=co&l1=Intel&l2=Pentium%20P54">CPU-Collection.de</a> - Intel Pentium images and descriptions</li> <li><a rel="nofollow" class="external text" href="http://www.plasma-online.de/english/identify/picture/intel_cpu.html">Plasma Online Intel CPU Identification</a></li> <li><a rel="nofollow" class="external text" href="http://www.chipdb.org/index.php?template=timeline">The Pentium Timeline Project</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20211223151333/http://www.chipdb.org/index.php?template=timeline">Archived</a> December 23, 2021, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> The Pentium Timeline Project maps oldest and youngest chip known of every s-spec made. Data are shown in an interactive timeline.</li></ul> <div class="mw-heading mw-heading3"><h3 id="Intel_datasheets">Intel datasheets</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=20" title="Edit section: Intel datasheets"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <ul><li><a rel="nofollow" class="external text" href="http://datasheets.chipdb.org/Intel/x86/Pentium/24159502.pdf">Pentium (P5)</a></li> <li><a rel="nofollow" class="external text" href="http://datasheets.chipdb.org/Intel/x86/Pentium/24199710.PDF">Pentium (P54)</a></li> <li><a rel="nofollow" class="external text" href="http://datasheets.chipdb.org/Intel/x86/Pentium%20MMX/24318504.PDF">Pentium MMX (P55C)</a></li> <li><a rel="nofollow" class="external text" href="http://datasheets.chipdb.org/Intel/x86/Pentium%20MMX/24329204.PDF">Mobile Pentium MMX (P55C)</a></li> <li><a rel="nofollow" class="external text" href="http://datasheets.chipdb.org/Intel/x86/Pentium%20MMX/24346802.PDF">Mobile Pentium MMX (Tillamook)</a></li></ul> <div class="mw-heading mw-heading3"><h3 id="Intel_manuals">Intel manuals</h3><span class="mw-editsection"><span class="mw-editsection-bracket">[</span><a href="/w/index.php?title=Pentium_(original)&action=edit&section=21" title="Edit section: Intel manuals"><span>edit</span></a><span class="mw-editsection-bracket">]</span></span></div> <p>These official manuals provide an overview of the Pentium processor and its features: </p> <ul><li>Pentium Processor Family Developer's Manual <a rel="nofollow" class="external text" href="https://web.archive.org/web/20111014203214/http://download.intel.com/design/intarch/manuals/24142805.pdf">Pentium Processor (Volume 1)</a> (Intel order number 241428)</li> <li>Pentium Processor Family Developer's Manual <a rel="nofollow" class="external text" href="ftp://download.intel.com/design/pentium/manuals/24319101.PDF">Volume 2: Instruction Set Reference</a> <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120313153131/ftp://download.intel.com/design/pentium/manuals/24319101.PDF">Archived</a> March 13, 2012, at the <a href="/wiki/Wayback_Machine" title="Wayback Machine">Wayback Machine</a> (Intel order number 243191)</li> <li>Pentium Processor Family Developer's Manual <a rel="nofollow" class="external text" href="ftp://download.intel.com/design/pentium/manuals/24143004.pdf">Volume 3: Architecture and Programming Manual</a><sup class="noprint Inline-Template"><span style="white-space: nowrap;">[<i><a href="/wiki/Wikipedia:Link_rot" title="Wikipedia:Link rot"><span title=" Dead link tagged November 2022">permanent dead link</span></a></i><span style="visibility:hidden; color:transparent; padding-left:2px">‍</span>]</span></sup> (Intel order number 241430)</li></ul> <table class="wikitable succession-box noprint" style="margin:0.5em auto; font-size:small;clear:both;"> <tbody><tr style="text-align:center;"> <td style="width:30%;" rowspan="1">Preceded by<div style="font-weight: bold"><a href="/wiki/I486" title="I486">i486</a></div> </td> <td style="width: 40%; text-align: center;" rowspan="1"><b> Pentium (original) </b><br />1993–1999 </td> <td style="width: 30%; text-align: center;" rowspan="1">Succeeded by<div style="font-weight: bold"><a href="/wiki/Pentium_II" title="Pentium II">Pentium II</a></div> </td></tr> </tbody></table> <div class="navbox-styles"><style data-mw-deduplicate="TemplateStyles:r1129693374">.mw-parser-output .hlist dl,.mw-parser-output .hlist ol,.mw-parser-output .hlist ul{margin:0;padding:0}.mw-parser-output .hlist dd,.mw-parser-output .hlist dt,.mw-parser-output .hlist li{margin:0;display:inline}.mw-parser-output .hlist.inline,.mw-parser-output .hlist.inline dl,.mw-parser-output .hlist.inline ol,.mw-parser-output .hlist.inline ul,.mw-parser-output .hlist dl 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.navbox-image img{max-width:none!important}@media print{body.ns-0 .mw-parser-output .navbox{display:none!important}}</style></div><div role="navigation" class="navbox" aria-labelledby="Intel_processors" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><link rel="mw-deduplicated-inline-style" href="mw-data:TemplateStyles:r1129693374"><style data-mw-deduplicate="TemplateStyles:r1239400231">.mw-parser-output .navbar{display:inline;font-size:88%;font-weight:normal}.mw-parser-output .navbar-collapse{float:left;text-align:left}.mw-parser-output .navbar-boxtext{word-spacing:0}.mw-parser-output .navbar ul{display:inline-block;white-space:nowrap;line-height:inherit}.mw-parser-output .navbar-brackets::before{margin-right:-0.125em;content:"[ "}.mw-parser-output .navbar-brackets::after{margin-left:-0.125em;content:" ]"}.mw-parser-output .navbar li{word-spacing:-0.125em}.mw-parser-output .navbar a>span,.mw-parser-output .navbar a>abbr{text-decoration:inherit}.mw-parser-output .navbar-mini abbr{font-variant:small-caps;border-bottom:none;text-decoration:none;cursor:inherit}.mw-parser-output .navbar-ct-full{font-size:114%;margin:0 7em}.mw-parser-output .navbar-ct-mini{font-size:114%;margin:0 4em}html.skin-theme-clientpref-night .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}@media(prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .navbar li a abbr{color:var(--color-base)!important}}@media print{.mw-parser-output .navbar{display:none!important}}</style><div class="navbar plainlinks hlist navbar-mini"><ul><li class="nv-view"><a href="/wiki/Template:Intel_processors" title="Template:Intel processors"><abbr title="View this template">v</abbr></a></li><li class="nv-talk"><a href="/wiki/Template_talk:Intel_processors" title="Template talk:Intel processors"><abbr title="Discuss this template">t</abbr></a></li><li class="nv-edit"><a href="/wiki/Special:EditPage/Template:Intel_processors" title="Special:EditPage/Template:Intel processors"><abbr title="Edit this template">e</abbr></a></li></ul></div><div id="Intel_processors" style="font-size:114%;margin:0 4em"><a href="/wiki/List_of_Intel_processors" title="List of Intel processors">Intel processors</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/List_of_Intel_processors" title="List of Intel processors">Processors</a> <ul><li><a href="/wiki/List_of_Intel_Atom_processors" title="List of Intel Atom processors">Atom</a></li> <li><a href="/wiki/List_of_Intel_Celeron_processors" title="List of Intel Celeron processors">Celeron</a></li> <li><a href="/wiki/List_of_Intel_Pentium_processors" title="List of Intel Pentium processors">Pentium</a> <ul><li><a href="/wiki/List_of_Intel_Pentium_Pro_processors" title="List of Intel Pentium Pro processors">Pro</a></li> <li><a href="/wiki/List_of_Intel_Pentium_II_processors" title="List of Intel Pentium II processors">II</a></li> <li><a href="/wiki/List_of_Intel_Pentium_III_processors" title="List of Intel Pentium III processors">III</a></li> <li><a href="/wiki/List_of_Intel_Pentium_4_processors" title="List of Intel Pentium 4 processors">4</a></li> <li><a href="/wiki/List_of_Intel_Pentium_D_processors" title="List of Intel Pentium D processors">D</a></li> <li><a href="/wiki/List_of_Intel_Pentium_M_processors" title="List of Intel Pentium M processors">M</a></li></ul></li> <li><a href="/wiki/List_of_Intel_Core_processors" title="List of Intel Core processors">Core</a> <ul><li><a href="/wiki/List_of_Intel_Core_2_processors" class="mw-redirect" title="List of Intel Core 2 processors">2</a></li> <li><a href="/wiki/List_of_Intel_Core_i3_processors" class="mw-redirect" title="List of Intel Core i3 processors">i3</a></li> <li><a href="/wiki/List_of_Intel_Core_i5_processors" class="mw-redirect" title="List of Intel Core i5 processors">i5</a></li> <li><a href="/wiki/List_of_Intel_Core_i7_processors" class="mw-redirect" title="List of Intel Core i7 processors">i7</a></li> <li><a href="/wiki/List_of_Intel_Core_i9_processors" class="mw-redirect" title="List of Intel Core i9 processors">i9</a></li> <li><a href="/wiki/List_of_Intel_Core_M_processors" class="mw-redirect" title="List of Intel Core M processors">M</a></li></ul></li> <li><a href="/wiki/List_of_Intel_Xeon_processors" title="List of Intel Xeon processors">Xeon</a></li> <li><a href="/wiki/Intel_Quark#List_of_Intel_Quark_processors" title="Intel Quark">Quark</a></li> <li><a href="/wiki/List_of_Intel_Itanium_processors" title="List of Intel Itanium processors">Itanium</a></li></ul></li> <li><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></li> <li><a href="/wiki/List_of_Intel_chipsets" title="List of Intel chipsets">Chipsets</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/P5_(microarchitecture)" class="mw-redirect" title="P5 (microarchitecture)">P5</a></li> <li><a href="/wiki/P6_(microarchitecture)" title="P6 (microarchitecture)">P6</a> <ul><li><a href="/wiki/Pentium_M" title="Pentium M">P6 variant (Pentium M)</a></li> <li><a href="/wiki/Yonah_(microprocessor)" title="Yonah (microprocessor)">P6 variant (Enhanced Pentium M)</a></li></ul></li> <li><a href="/wiki/NetBurst" title="NetBurst">NetBurst</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Core_(microarchitecture)" title="Intel Core (microarchitecture)">Core</a> <ul><li><a href="/wiki/Penryn_(microarchitecture)" title="Penryn (microarchitecture)">Penryn</a></li></ul></li> <li><a href="/wiki/Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a> <ul><li><a href="/wiki/Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a></li></ul></li> <li><a href="/wiki/Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a> <ul><li><a href="/wiki/Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a></li></ul></li> <li><a href="/wiki/Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a> <ul><li><a href="/wiki/Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a></li></ul></li> <li><a href="/wiki/Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a> <ul><li><a href="/wiki/Cannon_Lake_(microprocessor)" title="Cannon Lake (microprocessor)">Cannon Lake</a></li></ul></li> <li><a href="/wiki/Sunny_Cove_(microarchitecture)" title="Sunny Cove (microarchitecture)">Sunny Cove</a> <ul><li><a href="/wiki/Cypress_Cove_(microarchitecture)" class="mw-redirect" title="Cypress Cove (microarchitecture)">Cypress Cove</a></li></ul></li> <li><a href="/wiki/Willow_Cove" title="Willow Cove">Willow Cove</a></li> <li><a href="/wiki/Golden_Cove" title="Golden Cove">Golden Cove</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86" title="X86">x86</a> <a href="/wiki/Ultra-low-voltage_processor" title="Ultra-low-voltage processor">ULV</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a> <ul><li><a href="/wiki/Saltwell_(microarchitecture)" class="mw-redirect" title="Saltwell (microarchitecture)">Saltwell</a></li> <li><a href="/wiki/Silvermont" title="Silvermont">Silvermont</a></li></ul></li> <li><a href="/wiki/Goldmont" title="Goldmont">Goldmont</a> <ul><li><a href="/wiki/Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a></li></ul></li> <li><a href="/wiki/Tremont_(microarchitecture)" title="Tremont (microarchitecture)">Tremont</a> <ul><li><a href="/wiki/Gracemont_(microarchitecture)" title="Gracemont (microarchitecture)">Gracemont</a></li></ul></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)" scope="row" class="navbox-group" style="width:8.5em"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a> <ul><li><a href="/wiki/Intel_Core#10th_generation" title="Intel Core">10th gen</a></li> <li><a href="/wiki/Intel_Core#11th_generation" title="Intel Core">11th gen</a></li> <li><a href="/wiki/Intel_Core#12th_generation" title="Intel Core">12th gen</a></li> <li><a href="/wiki/Intel_Core#13th_generation" title="Intel Core">13th gen</a></li> <li><a href="/wiki/Intel_Core#14th_generation" title="Intel Core">14th gen</a></li></ul></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a></li></ul> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/Binary-coded_decimal" title="Binary-coded decimal">BCD</a> oriented (<a href="/wiki/4-bit_computing" title="4-bit computing">4-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_4004" title="Intel 4004">4004</a> (1971)</li> <li><a href="/wiki/Intel_4040" title="Intel 4040">4040</a> (1974)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">pre-x86 (<a href="/wiki/8-bit_computing" title="8-bit computing">8-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_8008" title="Intel 8008">8008</a> (1972)</li> <li><a href="/wiki/Intel_8080" title="Intel 8080">8080</a> (1974)</li> <li><a href="/wiki/Intel_8085" title="Intel 8085">8085</a> (1977)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Early <a href="/wiki/X86" title="X86">x86</a> (<a href="/wiki/16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_8086" title="Intel 8086">8086</a> (1978)</li> <li><a href="/wiki/Intel_8088" title="Intel 8088">8088</a> (1979)</li> <li><a href="/wiki/Intel_80186" title="Intel 80186">80186</a> (1982)</li> <li><a href="/wiki/Intel_80188" class="mw-redirect" title="Intel 80188">80188</a> (1982)</li> <li><a href="/wiki/Intel_80286" title="Intel 80286">80286</a> (1982)</li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X87" title="X87">x87</a> (external <a href="/wiki/Floating-point_unit" title="Floating-point unit">FPUs</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <dl><dt>8/16-bit databus</dt> <dd><a href="/wiki/Intel_8087" title="Intel 8087">8087</a> (1980)</dd> <dt>16-bit databus</dt> <dd><a href="/wiki/Intel_80C187" class="mw-redirect" title="Intel 80C187">80C187</a></dd> <dd><a href="/wiki/Intel_80287" class="mw-redirect" title="Intel 80287">80287</a></dd> <dd><a href="/wiki/Intel_80387SX" title="Intel 80387SX">80387SX</a></dd> <dt>32-bit databus</dt> <dd><a href="/wiki/Intel_80387" class="mw-redirect" title="Intel 80387">80387DX</a></dd> <dd><a href="/wiki/Intel_80487" class="mw-redirect" title="Intel 80487">80487</a></dd></dl> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/IA-32" title="IA-32">IA-32</a> (<a href="/wiki/32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/I386" title="I386">i386</a> <ul><li><a href="/wiki/Intel_80386SX" class="mw-redirect" title="Intel 80386SX">SX</a></li> <li><a href="/wiki/Intel_80376" title="Intel 80376">376</a></li> <li><a href="/wiki/Intel_80386EX" title="Intel 80386EX">EX</a></li></ul></li> <li><a href="/wiki/I486" title="I486">i486</a> <ul><li><a href="/wiki/I486SX" title="I486SX">SX</a></li> <li><a href="/wiki/Intel_DX2" title="Intel DX2">DX2</a></li> <li><a href="/wiki/Intel_DX4" title="Intel DX4">DX4</a></li> <li><a href="/wiki/I486SL" title="I486SL">SL</a></li> <li><a href="/wiki/RapidCAD" title="RapidCAD">RapidCAD</a></li> <li><a href="/wiki/I486_OverDrive" title="I486 OverDrive">OverDrive</a></li></ul></li> <li><a href="/wiki/Stealey" title="Stealey">A100/A110</a></li> <li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/List_of_Intel_Atom_processors#CE_SoCs" title="List of Intel Atom processors">CE</a></li> <li><a href="/wiki/Atom_(system_on_a_chip)" title="Atom (system on a chip)">SoC</a></li></ul></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a> (1998) <ul><li><a href="/wiki/Celeron#P6-based_Mobile_Celerons" title="Celeron">M</a></li> <li><a href="/wiki/Celeron#Prescott-256" title="Celeron">D</a> (2004)</li></ul></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a> <ul><li><a class="mw-selflink selflink">Original i586</a></li> <li><a href="/wiki/Pentium_OverDrive" title="Pentium OverDrive">OverDrive</a></li> <li><a href="/wiki/Pentium_Pro" title="Pentium Pro">Pro</a></li> <li><a href="/wiki/Pentium_II" title="Pentium II">II</a></li> <li><a href="/wiki/Pentium_III" title="Pentium III">III</a></li> <li><a href="/wiki/Pentium_4" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_M" title="Pentium M">M</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Dual-Core</a></li></ul></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a> <ul><li><a href="/wiki/List_of_Intel_P6-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel P6-based Xeon microprocessors">P6-based</a></li> <li><a href="/wiki/List_of_Intel_NetBurst-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel NetBurst-based Xeon microprocessors">NetBurst-based</a></li> <li><a href="/wiki/List_of_Intel_Core-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel Core-based Xeon microprocessors">Core-based</a></li></ul></li> <li><a href="/wiki/Intel_Quark" title="Intel Quark">Quark</a></li> <li><a href="/wiki/Tolapai" title="Tolapai">Tolapai</a></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="/wiki/X86-64" title="X86-64">x86-64</a> (<a href="/wiki/64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Intel_Atom" title="Intel Atom">Atom</a> <ul><li><a href="/wiki/Atom_(system_on_chip)" class="mw-redirect" title="Atom (system on chip)">SoC</a></li> <li><a href="/wiki/List_of_Intel_Atom_processors#CE_SoCs" title="List of Intel Atom processors">CE</a></li></ul></li> <li><a href="/wiki/Celeron" title="Celeron">Celeron</a> <ul><li><a href="/wiki/Celeron#Prescott-256" title="Celeron">D</a></li> <li><a href="/wiki/Celeron#Celeron_Dual-Core" title="Celeron">Dual-Core</a></li></ul></li> <li><a href="/wiki/Pentium" title="Pentium">Pentium</a> <ul><li><a href="/wiki/Pentium_4#Prescott_2M_(Extreme_Edition)" title="Pentium 4">4</a></li> <li><a href="/wiki/Pentium_D" title="Pentium D">D</a></li> <li><a href="/wiki/Pentium_D#Smithfield_XE" title="Pentium D">Extreme Edition</a></li> <li><a href="/wiki/Pentium_Dual-Core" title="Pentium Dual-Core">Dual-Core</a></li></ul></li> <li><a href="/wiki/Intel_Core" title="Intel Core">Core</a> <ul><li><a href="/wiki/Intel_Core_2" title="Intel Core 2">2</a></li> <li><a href="/wiki/Intel_Core#1st_generation" title="Intel Core">1st gen</a></li> <li><a href="/wiki/Intel_Core#2nd_generation" title="Intel Core">2nd gen</a></li> <li><a href="/wiki/Intel_Core#3rd_generation" title="Intel Core">3rd gen</a></li> <li><a href="/wiki/Intel_Core#4th_generation" title="Intel Core">4th gen</a></li> <li><a href="/wiki/Intel_Core#5th_generation" title="Intel Core">5th gen</a></li> <li><a href="/wiki/Intel_Core#6th_generation" title="Intel Core">6th gen</a></li> <li><a href="/wiki/Intel_Core#7th_generation" title="Intel Core">7th gen</a></li> <li><a href="/wiki/Intel_Core#8th_generation" title="Intel Core">8th gen</a></li> <li><a href="/wiki/Intel_Core#9th_generation" title="Intel Core">9th gen</a></li> <li><a href="/wiki/Intel_Core#10th_generation" title="Intel Core">10th gen</a></li> <li><a href="/wiki/Intel_Core#11th_generation" title="Intel Core">11th gen</a></li> <li><a href="/wiki/List_of_Intel_Core_M_processors" class="mw-redirect" title="List of Intel Core M processors">M</a></li></ul></li> <li><a href="/wiki/Xeon" title="Xeon">Xeon</a> <ul><li><a href="/wiki/List_of_Intel_Xeon_processors_(Nehalem-based)" title="List of Intel Xeon processors (Nehalem-based)">Nehalem-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Sandy_Bridge-based)" title="List of Intel Xeon processors (Sandy Bridge-based)">Sandy Bridge-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Ivy_Bridge-based)" title="List of Intel Xeon processors (Ivy Bridge-based)">Ivy Bridge-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Haswell-based)" title="List of Intel Xeon processors (Haswell-based)">Haswell-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Broadwell-based)" title="List of Intel Xeon processors (Broadwell-based)">Broadwell-based</a></li> <li><a href="/wiki/List_of_Intel_Xeon_processors_(Skylake-based)" title="List of Intel Xeon processors (Skylake-based)">Skylake-based</a></li></ul></li></ul> </div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em"> <dl><dt><a href="/wiki/Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></dt> <dd><a href="/wiki/Intel_iAPX_432" title="Intel iAPX 432">iAPX 432</a></dd> <dt><a href="/wiki/Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></dt> <dd><a href="/wiki/Itanium" title="Itanium">Itanium</a></dd> <dt><a href="/wiki/Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></dt> <dd><a href="/wiki/Intel_i860" title="Intel i860">i860</a></dd> <dd><a href="/wiki/Intel_i960" title="Intel i960">i960</a></dd> <dd><a href="/wiki/StrongARM" title="StrongARM">StrongARM</a></dd> <dd><a href="/wiki/XScale" title="XScale">XScale</a></dd></dl> </div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"> <ul><li><a href="/wiki/Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li> <li><a href="/wiki/Process%E2%80%93architecture%E2%80%93optimization_model" title="Process–architecture–optimization model">Process–architecture–optimization model</a></li> <li><a href="/wiki/List_of_Intel_graphics_processing_units" title="List of Intel graphics processing units">Intel GPUs</a> <ul><li><a href="/wiki/Intel_GMA" title="Intel GMA">GMA</a></li> <li><a href="/wiki/Intel_Graphics_Technology" title="Intel Graphics Technology">Intel HD, UHD, and Iris Graphics</a></li> <li><a href="/wiki/Intel_Xe" title="Intel Xe">Xe</a></li> <li><a href="/wiki/Intel_Arc" title="Intel Arc">Arc</a></li></ul></li> <li><a href="/wiki/Platform_Controller_Hub" title="Platform Controller Hub">PCHs</a></li> <li><a href="/wiki/System_Controller_Hub" title="System Controller Hub">SCHs</a></li> <li><a href="/wiki/I/O_Controller_Hub" title="I/O Controller Hub">ICHs</a></li> <li><a href="/wiki/PCI_IDE_ISA_Xcelerator" class="mw-redirect" title="PCI IDE ISA Xcelerator">PIIXs</a></li> <li><a href="/wiki/Stratix" title="Stratix">Stratix</a></li> <li><a href="/wiki/List_of_Intel_codenames" title="List of Intel codenames">Codenames</a></li> <li><a href="/wiki/Larrabee_(microarchitecture)" title="Larrabee (microarchitecture)">Larrabee</a></li></ul> </div></td></tr></tbody></table></div>    </div><noscript><img src="https://login.wikimedia.org/wiki/Special:CentralAutoLogin/start?type=1x1&useformat=desktop" alt="" width="1" height="1" style="border: none; position: absolute;"></noscript> <div class="printfooter" data-nosnippet="">Retrieved from "<a dir="ltr" href="https://en.wikipedia.org/w/index.php?title=Pentium_(original)&oldid=1259260337">https://en.wikipedia.org/w/index.php?title=Pentium_(original)&oldid=1259260337</a>"</div></div> <div id="catlinks" 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