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CHIPS Act: This Startup Shows Why It’s Needed - IEEE Spectrum
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tag-mosfet tag-startups tag-devices post-section--topic/semiconductors" data-category="Semiconductors"><article elid="2669401997" data-frozen-sections="[]" class="clearfix image-article sm-mb-1 quality-HD post-2669401997" data-category="Semiconductors"><div class="row px10"><div class="rm-col-center col sm-mb-1" style="width:100.0%;"><div class="widget__body clearfix sm-mt-1"><div class="all-related-sections"><a href="https://spectrum.ieee.org/topic/semiconductors/">Semiconductors</a><a href="https://spectrum.ieee.org/magazine/">Magazine</a><a href="https://spectrum.ieee.org/magazine/2024/november/">November 2024</a><a href="https://spectrum.ieee.org/type/feature/">Feature</a><a href="https://spectrum.ieee.org/special-reports/">Special Reports</a></div><h1 class="widget__headline h1"><span class="widget__headline-text custom-post-headline" data-type="text"> This Startup Shows Why the U.S. CHIPS Act Is Needed </span></h1><div class="widget__subheadline"><h2 class="widget__subheadline-text h2" data-type="text"><p>From lab to fab, Ideal Semiconductor’s journey would have been quicker</p></h2></div><div class="social-author clearfix"><div class="social-author__avatar image"><div class="cover-all image" style="background-image: url("https://spectrum.ieee.org/media-library/eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJpbWFnZSI6Imh0dHBzOi8vYXNzZXRzLnJibC5tcy8yNzMxMjYxNi9vcmlnaW4ucG5nIiwiZXhwaXJlc19hdCI6MTc1NTQwNTgwNX0.yatZN96AZvBT2mrwe30xAdHNBEgEQUx-MrcY7PEC-e0/image.png?width=210")"></div></div><a class="social-author__name" href="https://spectrum.ieee.org/u/samuel-k-moore" data-type="text">Samuel K. Moore</a></div><div class="social-date"><span class="social-date__text">21 Oct 2024</span></div><div class="time-to-read">11 min read</div><div class="like-button" data-post-likes="5"></div><div class="widget__shares share-panel"><!-- EMAIL --><a href="mailto:?subject=This%20Startup%20Shows%20Why%20the%20U.S.%20CHIPS%20Act%20Is%20Needed&body=https://spectrum.ieee.org/power-electronics" target="_blank" data-track-share="Email" class="share share-popup share-email" rel="noopener noreferrer" aria-label="Share via Email"><i aria-hidden="true" class="icons-share em fa fa-envelope"></i></a><!-- COPY LINK --><a href="https://spectrum.ieee.org/power-electronics" data-clipboard-text="https://spectrum.ieee.org/power-electronics" class="share share-copy-link" title="Copy this link to clipboard"><i class="icons-share" style="width: 60%"><svg aria-hidden="true" data-prefix="far" data-icon="copy" class="svg-inline--fa fa-copy fa-w-14" role="img" xmlns="http://www.w3.org/2000/svg" viewbox="0 0 448 512"><path fill="currentColor" d="M433.941 65.941l-51.882-51.882A48 48 0 0 0 348.118 0H176c-26.51 0-48 21.49-48 48v48H48c-26.51 0-48 21.49-48 48v320c0 26.51 21.49 48 48 48h224c26.51 0 48-21.49 48-48v-48h80c26.51 0 48-21.49 48-48V99.882a48 48 0 0 0-14.059-33.941zM266 464H54a6 6 0 0 1-6-6V150a6 6 0 0 1 6-6h74v224c0 26.51 21.49 48 48 48h96v42a6 6 0 0 1-6 6zm128-96H182a6 6 0 0 1-6-6V54a6 6 0 0 1 6-6h106v88c0 13.255 10.745 24 24 24h88v202a6 6 0 0 1-6 6zm6-256h-64V48h9.632c1.591 0 3.117.632 4.243 1.757l48.368 48.368a6 6 0 0 1 1.757 4.243V112z"></path></svg></i></a><!-- TWITTER --><a href="https://twitter.com/intent/tweet?url=https://spectrum.ieee.org/power-electronics&text=This%20Startup%20Shows%20Why%20the%20U.S.%20CHIPS%20Act%20Is%20Needed&" target="_blank" data-track-share="Twitter" class="share share-popup share-tw" rel="noopener noreferrer" aria-label="Share on Twitter"><i aria-hidden="true" class="icons-share tw fa fa-twitter"></i></a><!-- FACEBOOK --><a href="https://www.facebook.com/sharer/sharer.php?u=https%3A%2F%2Fspectrum.ieee.org%2Fpower-electronics%3Fxrs%3DRebelMouse_fb%26ts%3D1730471674" target="_blank" data-track-share="Facebook" class="share share-popup share-fb" rel="noopener noreferrer" aria-label="Share on Facebook"><i aria-hidden="true" class="icons-share fb fa fa-facebook"></i></a><!-- LINKEDIN --><a href="https://www.linkedin.com/shareArticle?mini=false&url=https://spectrum.ieee.org/power-electronics&" target="_blank" class="share share-popup share-linkedin" data-track-share="Linkedin" rel="noopener noreferrer" aria-label="Share on Linkedin"><i aria-hidden="true" class="icons-share fa fa-linkedin"></i></a></div><div class="custom-field-FeaturePostImgPosition">Vertical</div></div><div class="widget__head"><picture><source srcset="https://spectrum.ieee.org/media-library/lit-in-blue-a-middle-aged-man-stands-in-front-of-a-whiteboard-with-equations-and-technical-diagrams.png?id=53817942&width=3600&height=5397 3x, https://spectrum.ieee.org/media-library/lit-in-blue-a-middle-aged-man-stands-in-front-of-a-whiteboard-with-equations-and-technical-diagrams.png?id=53817942&width=2400&height=3598 2x, https://spectrum.ieee.org/media-library/lit-in-blue-a-middle-aged-man-stands-in-front-of-a-whiteboard-with-equations-and-technical-diagrams.png?id=53817942&width=1200&height=1799 1x"/><img fetchpriority="high" role="img" alt="Lit in blue, a middle-aged man stands in front of a whiteboard with equations and technical diagrams." aria-label="Lit in blue, a middle-aged man stands in front of a whiteboard with equations and technical diagrams." src="https://spectrum.ieee.org/media-library/lit-in-blue-a-middle-aged-man-stands-in-front-of-a-whiteboard-with-equations-and-technical-diagrams.png?id=53817942&width=1200&height=1799" style="object-fit: cover;" class="rm-lazyloadable-image rm-hero-media" width="2668" height="4000"/></picture></div><div class="widget__body clearfix sm-mt-1"><div class="photo-caption"><p>Ideal Semiconductor cofounder Mark Granahan’s idea for a new power transistor required an innovation ecosystem that the United States lacked. </p></div><div class="photo-credit"> Jayme Thornton </div><div class="custom-field-FeaturePostColor">DarkBlue1</div><span class="js-scroll-trigger" data-target="body" data-triggers="render-rebelbar" data-toggle-class="with-floating-shares"></span><div id="utm_campaign"></div><div class="body js-expandable clearfix js-listicle-body css-listicle-body-2669401997" data-headline="This Startup Shows Why the U.S. CHIPS Act Is Needed"><div class="body-description"><p><strong>There’s a certain sameness</strong> to spaces meant for tech startups: flexible cubicle arrangements, glass-encased executive offices, whiteboard walls awaiting equations and ideas, basement laboratories for the noisier and more dangerous parts of the process. In some ways the home of <a href="https://idealsemi.com/" target="_blank">Ideal Semiconductor</a> on the campus of Lehigh University, in Bethlehem, Penn., is just like that. The most noticeable difference is a life-size statue of 18th-century inventor and electricity enthusiast Benjamin Franklin seated on the bench outside. </p><p> Ideal cofounder and CEO Mark Granahan admits to having had a quiet moment or two with ole Benny Kite-and-Key, but it takes a lot more than inspiration from a founder of your home country to turn a clever idea into a valuable semiconductor company. Navigating from lightbulb moment to laboratory demo and finally to manufactured reality has always been the defining struggle of hardware startups. But Ideal’s journey is particularly illustrative of the state of invention in the U.S. semiconductor industry today and, in particular, how the <a href="https://spectrum.ieee.org/tag/chips-act" target="_self">CHIPS and Science Act</a>, a law the startup’s founders personally and exhaustively advocated for, might change things for the better. </p><div class="ieee-sidebar-small"><p><a href="https://wikimediadc.org/wiki/Peter_Meyer" rel="noopener noreferrer" target="_blank"></a>This article is part of our special report, “<a href="https://spectrum.ieee.org/special-reports/reinventing-invention/" target="_blank">Reinventing Invention: Stories from Innovation’s Edge</a>.” </p></div><p> That law, passed in 2022, is best known for pumping tens of billions of dollars into the construction of new leading-edge CMOS fabs in the United States, a country that had exactly zero such facilities at the time. But there’s another side to the effort, one that’s intended to speed the critical lab-to-fab process for new technologies and lead to more and better semiconductor-based inventions that can be manufactured (mostly) in the United States. </p><p> And it’s this side that Ideal’s founders think will make the biggest difference for semiconductor startups. How big? While the CHIPS Act comes for the most part too late for Ideal’s first product, its executives think that if the law had been around and implemented, the company’s seven-year journey to a marketed product would have been done in half the time and maybe 60 percent of the cost. If it could do that for one startup, imagine the effect on the industrial and innovation ecosystem of a hundred such accelerated startups. Or a thousand. </p><p> “If you’ve got time and money, it solves a lot of things,” says Granahan. “But as a startup, time and money—those are the two things you don’t have enough of, ever.” The hope is that the CHIPS Act and similar efforts in Europe and elsewhere can save startups a bit of both. </p><h2>Ideal’s Big Idea </h2><p> To understand Ideal’s path and how the CHIPS Act could have changed it, you first need to know what invention Ideal was built around. It’s not some new kind of AI processor, exotic memory device, or cryogenic quantum interface chip. In fact, it’s just about as humble-seeming as it gets in the semiconductor space—a discrete silicon metal-oxide-semiconductor field-effect <a href="https://spectrum.ieee.org/tag/transistor">transistor</a> designed for power-delivery circuits. </p><p> Similar devices are employed everywhere you look to convert one voltage to another. The dimmer switch on your wall has at least one; cars have hundreds, a <a href="https://spectrum.ieee.org/tag/humanoid-robot">humanoid robot</a> probably needs more than 60 to drive the motors in its joints; you’re almost certainly within 10 meters of one right now. Such discrete devices composed a US $34 billion market in 2022 that’s <a href="https://www.linkedin.com/pulse/power-discrete-semiconductor-market-size-2024-share-cagr-zj23e/" target="_blank">predicted to grow to $50 billion by 2030</a>, according to the <a href="https://www.semiconductors.org/wp-content/uploads/2023/05/SIA-2023-Factbook_1.pdf" target="_blank"><em><em>Semiconductor Industry Association 2023 Factbook</em></em></a>. </p><p class="shortcode-media shortcode-media-rebelmouse-image"><img alt="Three block-like illustrations made up of sections with different colors." class="rm-shortcode rm-lazyloadable-image" data-rm-shortcode-id="68ab8011b1ba466c76016cf36577b9c5" data-rm-shortcode-name="rebelmouse-image" data-runner-src="https://spectrum.ieee.org/media-library/three-block-like-illustrations-made-up-of-sections-with-different-colors.png?id=53818098&width=980" height="1120" id="e8b58" lazy-loadable="true" src="data:image/svg+xml,%3Csvg%20xmlns='http://www.w3.org/2000/svg'%20viewBox='0%200%202062%201120'%3E%3C/svg%3E" width="2062"/></p><p> The ideal power transistor blocks high voltages when it’s off, conducts current with no resistance when it’s on, and switches between states rapidly with no loss of power. No device is truly ideal, but Granahan and the company’s other cofounders, <a href="https://idealsemi.com/about/" target="_blank">David Jauregui and Michael Burns</a>, thought they could get a lot closer to it than today’s market-leading silicon devices could. </p><p> To see how, you have to start with the transistor architecture that is now a generation behind the leading silicon performers. Called the HEXFET and first developed at <a href="https://www.infineon.com/cms/en/about-infineon/press/press-releases/2015/INFXX201501-020.html" target="_blank">International Rectifier</a>, it changed the game by turning the transistor from a device built primarily in the plane of the silicon into one with a vertical structure. </p><p> That structure evolved to become a layer cake that gets more complex as you move from the bottom to the top. Starting at the bottom is a region of silicon that has been chemically doped to contain a high concentration of excess mobile electrons, making it <em><em>n</em></em>-type silicon. This is the device’s drain. Above that is a thicker region with a lower concentration of excess electrons. And atop this is the more complex layer. Here the device’s source, a region of <em><em>n</em></em>-type silicon, is vertically separated from the rest of the device by the channel, a region of silicon with excess of mobile positive charge (holes), making it <em><em>p</em></em>-type. Embedded at the center of the channel is the transistor’s gate, which is electrically separated from everything else by a narrow layer of insulation. </p><p> Positive voltage at the gate shoves the positive charge in the <em><em>p</em></em>-type silicon aside, creating a conductive path from the source to the drain, switching the device on. Real HEXFETs are made up of many such vertical devices in parallel. </p><p> HEXFET was a great leap forward, but higher voltages are its Achilles heel. If you design it to block more voltage—by making the middle layer thicker, say—the resistance of the device when it’s supposed to be conducting current shoots up, increasing faster than the square of the voltage you’re trying to block. Higher voltage operation is important, because it leads to less loss in transmission, even across fairly short distances such as the those inside electric cars and computers. </p><p class="pull-quote"> “When COVID hit, all of a sudden...the phone started ringing off the hook” <strong>–Mark Granahan</strong></p><p> The solution, and the leading architecture for silicon power transistors today, is called RESURF Superjunction. It allows the blocking of higher voltages in a less resistive structure by replacing part of the middle <em><em>n</em></em>-type layer with <em><em>p</em></em>-type material. The result is a structure with a balance of charge, which blocks high voltages. But this solution effectively cuts the device’s conductive area in half, meaning it’s difficult to improve performance by reducing resistance. </p><p> Ideal’s big idea is a way to have your silicon layer cake and eat it too. Called SuperQ, it restores the HEXFET’s conductive area while keeping the RESURF’s ability to block high voltages. Instead of blocking voltage by devoting a large volume of <em><em>p</em></em>-type silicon to balancing the device’s internal charges, SuperQ gets the same effect using a nanometers-thin proprietary film formed within narrow, deep trenches. Thus, the transistor regains its wide, low-resistance structure while still handling high voltage. </p><p> But this win-win needed some chipmaking techniques not found in the world of silicon power devices—namely, the ability to etch a deep, narrow (high-aspect ratio) trench and the tools to lay down material one atomic layer at a time. Both are common in advanced CMOS and memory-chip fabrication, but getting hold of them in a manufacturing environment for discrete devices was a major roadblock for Ideal. </p><h2>An Idea and Its Environment</h2><p> In 2014, Granahan had recently retired after selling his previous startup Ciclon to Texas Instruments. “I took some time off to basically relax and think,” he says. For Granahan relaxing and thinking involved reading IEEE publications and other technical journals. </p><p> And there, he saw the glimmerings of a way past the limitations of the silicon power MOSFET. In particular, he noted experimental work attempting to execute a charge balancing act in photovoltaic cells. It relied on two things. The first were <a href="https://spectrum.ieee.org/the-highk-solution" target="_blank">high-</a><em><em><a href="https://spectrum.ieee.org/the-highk-solution">k</a></em></em> dielectrics—alumina, hafnia, and other insulators that are good at holding back charge while at the same time transmitting the charge’s electric field. These had come into use barely five years earlier in <a href="https://spectrum.ieee.org/tag/intel">Intel</a> CPUs. The second was a method of building nanometers-thin films of these insulators. This technique is called atomic layer deposition, or ALD. </p><p> Purchasing time at Pennsylvania State University’s <a href="https://www.mri.psu.edu/nanofabrication-lab" target="_blank">Nanofabrication Laboratory</a>, Granahan got to work trying out different combinations of dielectrics and processing recipes, finally proving that the SuperQ concept could work but that it would need some advanced processing equipment to get there. </p><p class="shortcode-media shortcode-media-rebelmouse-image rm-resized-container rm-resized-container-25 rm-float-left" data-rm-resized-container="25%" style="float: left;"><img alt="Lit in red and blue, a electronic component lies on a surface with regular divisions." class="rm-shortcode rm-lazyloadable-image rm-resized-image" data-rm-shortcode-id="528708860794c1e14200e3c19923879e" data-rm-shortcode-name="rebelmouse-image" data-runner-src="https://spectrum.ieee.org/media-library/lit-in-red-and-blue-a-electronic-component-lies-on-a-surface-with-regular-divisions.png?id=53818074&width=980" height="3750" id="c7891" lazy-loadable="true" src="data:image/svg+xml,%3Csvg%20xmlns='http://www.w3.org/2000/svg'%20viewBox='0%200%203000%203750'%3E%3C/svg%3E" style="max-width: 100%" width="3000"/><small class="image-media media-caption" placeholder="Add Photo Caption..." style="max-width: 100%;">The fruit of Ideal Semiconductor’s labor is a power transistor based on its SuperQ technology. </small><small class="image-media media-photo-credit" placeholder="Add Photo Credit..." style="max-width: 100%;">Jayme Thornton </small></p><p> “There wasn’t this aha moment,” he says of the initial part of the invention process. “But there was this learning process that I had to go through to get us to the starting point.” </p><p> That starting point might have been an ending point, as it is for so many potentially transformative ideas. The big, early, hurdle was the usual one: money. </p><p> U.S. venture capital was generally not interested in semiconductor startups at the time, according to Granahan and one of those venture capitalists, <a href="https://www.celesta.vc/people/nicholas-brathwaite" target="_blank">Celesta Capital’s Nic Braithwaite</a>. Brathwaite had spent decades in semiconductor-technology development and chip packaging, before cofounding his first fund in 2008 and then Celesta in 2013. At the time “nobody was a VC in semiconductors,” he says. </p><p> Nevertheless, there was a ready source of cash out there, says Granahan—China-based or Chinese-backed funds. But Granahan and his partners were reluctant to accept funding from China, for a couple of reasons. It usually came with strings attached, such as requiring that devices be manufactured in the country and that intellectual property be transferred there. Also, Granahan and his colleagues had been burned before. His previous startup’s secrets had somehow escaped the fab they were using in Singapore and turned up in competing devices in China. </p><p> “We lost our IP in very short order,” he says. So they were determined not just to avoid Chinese funding but to develop and ultimately manufacture the devices domestically. </p><p> “We needed a partner to go off and develop the device architecture and the process technology that went with that,” he explains. What Ideal’s founders were looking for was a U.S.-based foundry that had specialized equipment and a willingness to help them develop a new process using it. Unfortunately, in 2017, such a creature did not exist. </p><p> Determined to find a domestic partner, Ideal’s executives decided to settle on a “suboptimal solution.” They found a small manufacturer in California (which the executives decline to name) that was not up to snuff in terms of its capabilities and the pace at which it could help Ideal develop SuperQ devices. Ideal even had to invest in equipment for this company, so it could do the job. </p><p><div class="rebellt-item ieee-sidebar-left col1" id="rebelltitem1" data-id="1" data-reload-ads="false" data-is-image="False" data-href="https://spectrum.ieee.org/power-electronics/the-nstc-opens-to-members" data-basename="the-nstc-opens-to-members" data-post-id="2669401997" data-published-at="1729015544" data-use-pagination="False"><h3 data-role="headline"> The NSTC Opens to Members </h3><p><span style="background-color: initial;">The National Semiconductor Technology Center (<a href="https://www.nist.gov/chips/research-development-programs/national-semiconductor-technology-center" target="_blank">NSTC</a>) is the part of the CHIPS Act meant to give the United States a durable position in the semiconductor industry by providing access to the tools and training to develop new generations of chips. A public-private partnership, the entity will run as a <a href="https://natcast.org/nstcmembership" target="_blank">membership</a> organization. <a href="https://natcast.org/" target="_blank">Natcast</a>, its non-profit operator, recently </span><span style="background-color: initial;">opened up</span> membership <span style="background-color: initial;">in NSTC </span><span style="background-color: initial;">with the aim of </span><span style="background-color: initial;">ultimately giving</span> everyone from materials startups to gigantic <a href="https://spectrum.ieee.org/tag/cloud-computing">cloud computing</a> providers access.</p><p>Natcast wants “to make sure that membership is accessible to all,” says <a href="https://www.linkedin.com/in/feindtsusan/" target="_blank">Susan Feindt</a>, senior vice president of ecosystem development at Natcast. “We need broad representation from all the stakeholders in the semiconductor ecosystem.” Membership is on a sliding scale according to the size and nature of the organization involved—as little as US $1,600 for the smallest startup to $660,000 for an Nvidia-scale entity. </p><p>But such a diversity of members means not everyone will want the same things out of the NSTC. Feindt anticipates that startups will likely take advantage of some NSTC’s earliest offerings. One is access to advanced electronic design automation (EDA) design tools, through what NSTC’s calling a design enablement gateway. Another is the arrangement of multiproject wafers, which are opportunities to aggregate chips from a number of organizations to fill a wafer in a fab, cutting down on development costs. </p><p>Eventually, Natcast will be running a design center, an advanced equipped with extreme-ultraviolet lithography, and a pilot line for new semiconductor and packaging tech. And NSTC’s members will be directing the organization’s R&D priorities. </p><p>“The investment we’re making in manufacturing is going to clearly change the trajectory” of the U.S. semiconductor industry, says Feindt. “But the investment in R&D should ensure that it’s enduring.”</p></div></p><p> The experience of getting to that point revealed some things about the U.S. semiconductor industry that Ideal’s founders found quite alarming. The most critical of them was the extreme concentration of chip manufacturing in Asia in general and Taiwan in particular. In 2018, most of the biggest names in advanced <a href="https://spectrum.ieee.org/topic/semiconductors/">semiconductors</a> were so-called fabless companies headquartered in the United States. That is, they designed chips and then hired a foundry, such as Taiwan Semiconductor Manufacturing Co. (<a href="https://spectrum.ieee.org/tag/tsmc">TSMC</a>) or Samsung, to make them. Then typically a third company tested and packaged the chips, also in Asia, and shipped them back to the designer. </p><p> All this is still true. It’s standard operating procedure for U.S-based tech titans like <a href="https://spectrum.ieee.org/tag/amd">AMD</a>, Apple, <a href="https://spectrum.ieee.org/tag/google">Google</a>, <a href="https://spectrum.ieee.org/tag/nvidia">Nvidia</a>, Qualcomm, and many others. </p><p> By 2018, the ability to manufacture cutting-edge logic in the United States had atrophied and was nearing death. <a href="https://spectrum.ieee.org/tag/intel">Intel</a>, which at the time made its own chips and is only now becoming a proper foundry, stumbled badly in its development of new process technology, falling behind <a href="https://spectrum.ieee.org/taiwan-semiconductor" target="_self">TSMC</a> for the first time. And Malta, N.Y.–based <a href="https://www.globalfoundries.com/" rel="noopener noreferrer" target="_blank">GlobalFoundries</a>, the third-largest foundry, <a href="https://spectrum.ieee.org/globalfoundries-cto-on-why-the-company-abandoned-the-bleeding-edge" target="_self">abruptly abandoned</a> its <a href="https://spectrum.ieee.org/euv-lithography-finally-ready-for-chip-manufacturing" rel="noreferrer noopener" target="_self">development of advanced-process technologies</a>, because continuing on would have sent the company into a financial doom loop. </p><p> The situation was so skewed that <a href="https://www.semiconductors.org/strengthening-the-global-semiconductor-supply-chain-in-an-uncertain-era/" rel="noopener noreferrer" target="_blank">100 percent of advanced logic manufacturing</a> was being done in Asia at the time, and by itself, TSMC did 92 percent of that. (Things weren’t that much different for less advanced chips—77 percent were made in Asia, with China making up 30 percent of that.) </p><p> “Asia had a pocket veto on semiconductor development in the United States,” Granahan concluded. “The U.S. had lost its startup semiconductor ecosystem.” </p><h2>Mr. Burns Goes to Washington</h2><p> Concerned and frustrated, Granahan, with cofounder and executive chairman Mike Burns, did something positive: They took their experiences to the government. “Mike and myself, but Mike in particular, spent a lot of time in D.C. talking to people in the House and Senate—staff, [Republicans, Democrats], anyone who would listen to us,” he relates. Burns reckons they had as many as 75 meetings. The response, he says, was generally “a lot of disbelief.” Many of the political powers they spoke to simply didn’t believe that the United States had fallen so far behind in semiconductor production. </p><p> But there were certain sectors of the U.S. government that were already concerned, seeing semiconductors as an issue of national security. Taiwan and South Korea, are, after all, geographically cheek by jowl with the United States’ rival China. So by late 2019, the seeds of a future CHIPS Act that would seek to onshore advanced semiconductor manufacturing and more were beginning to germinate in D.C. And although there was some bipartisan support in both houses of Congress, it wasn’t a priority. </p><p> Then came COVID-19. </p><h2>Supply-Chain Focus</h2><p> Remember the crash course in supply-chain logistics that came with the terrifying global pandemic in 2020? For many of the things consumers wanted but couldn’t get in that first year of contagion-fueled confusion, the reason for the unavailability was, either directly or indirectly, a shortage of semiconductors. </p><p> “When COVID hit, all of a sudden…the phone started ringing off the hook,” says Granahan.“The CHIPS bill predates the pandemic, but the pandemic really exposed why we need this bill,” says <a href="https://www.linkedin.com/in/gyeric/" target="_blank">Greg Yeric</a>, formerly CTO of a <a href="https://spectrum.ieee.org/arm-spinout-details-correlatedelectron-memory-plans" target="_self">semiconductor startup</a>, and now director of research at the <a href="https://www.nist.gov/chips" target="_blank">U.S. Commerce Department office that executes the CHIPS Act</a>. </p><p> Momentum started to swing behind a legislative fix, and in early January 2021 Congress overrode a presidential veto to pass a defense bill that included the framework of what would become the CHIPS and Science Act. The later bill, signed into law in August 2022, promises $52 billion for the project—$39 billion to fund new manufacturing, $2 billion for semiconductors for the defense sector, and $11 billion for R&D. The R&D allocation includes funding for a concept Burns and his colleagues had been pushing for, called the <a href="https://www.nist.gov/chips/vision-and-strategy-national-semiconductor-technology-center" target="_blank">National Semiconductor Technology Center (NSTC)</a>. </p><p> From a startup’s point of view, the purpose of the NSTC is to bridge the lab-to-fab doldrums that Ideal found itself stuck in for so many years by providing a place to test and pilot new technology. In the strategy paper laying out the plan for the NSTC, the government says it is meant to “expand access to design and manufacturing resources” and “reduce the time and cost of bringing technologies to market.” </p><p class="shortcode-media shortcode-media-rebelmouse-image rm-resized-container rm-resized-container-25 rm-float-left" data-rm-resized-container="25%" style="float: left;"><img alt=" A man stands hunched over a laboratory bench with many wires. A whiteboard with equations is seen over his shoulder." class="rm-shortcode rm-lazyloadable-image rm-resized-image" data-rm-shortcode-id="271a5b6d456c1edb8db7439c884e5f34" data-rm-shortcode-name="rebelmouse-image" data-runner-src="https://spectrum.ieee.org/media-library/a-man-stands-hunched-over-a-laboratory-bench-with-many-wires-a-whiteboard-with-equations-is-seen-over-his-shoulder.png?id=53818133&width=980" height="4000" id="f4a5e" lazy-loadable="true" src="data:image/svg+xml,%3Csvg%20xmlns='http://www.w3.org/2000/svg'%20viewBox='0%200%202668%204000'%3E%3C/svg%3E" style="max-width: 100%" width="2668"/><small class="image-media media-caption" placeholder="Add Photo Caption..." style="max-width: 100%;">Orion Kress-Sanfilippo, an applications engineer at Ideal Semiconductor, tests the performance of a SuperQ device in a power supply. </small><small class="image-media media-photo-credit" placeholder="Add Photo Credit..." style="max-width: 100%;">Jayme Thornton </small></p><p> Some of the details of how NSTC is going to do that have begun to emerge. The center will be operated by a public-private partnership called Natcast, and a CEO was recently chosen in Cisco Systems’ former chief security officer, <a href="https://natcast.org/deirdre-hanford-ceo" target="_blank">Deirdre Hanford</a>. And in July, the government settled on the formation of <a href="https://www.nist.gov/news-events/news/2024/07/biden-harris-administration-announces-first-chips-america-rd-facilities-and" target="_blank">three main NSTC facilities</a>—a prototyping and advanced-packaging pilot plant, an administrative and design site, and a center built around <a href="https://spectrum.ieee.org/tag/euv" target="_self">extreme ultraviolet lithography</a>. (<a href="https://spectrum.ieee.org/high-na-euv">EUV</a> lithography is the $100-million-plus linchpin technology for cutting-edge CMOS development.) The administration intends for the NSTC design facility to be operational next year, followed by the EUV center in 2026, and the prototyping and packaging facility in 2028.<br/></p><p> “If we would have had access to this NSTC-type function, then I think that that would have fulfilled that gap area,” says Granahan. </p><h2>Manufacturing the Future</h2><p> Today, after seven years, Ideal is nearing commercial release of its first SuperQ device. The startup has also found a manufacturer, Bloomington, Minn.–based <a href="https://polarsemi.com/" rel="noopener noreferrer" target="_blank">Polar Semiconductor</a>. In late September, Polar became the first company to be awarded funds from the CHIPS Act—$123 million to help expand and modernize its fab with the aim of doubling U.S. production and turning itself into a foundry. </p><div class="rm-embed embed-media"><div class="flourish-embed flourish-map" data-src="visualisation/17535944?607871"><script src="https://public.flourish.studio/resources/embed.js"> </script><noscript><img alt="map visualization" src="https://public.flourish.studio/visualisation/17535944/thumbnail" width="100%"/></noscript></div></div><p> The NSTC’s prototyping facility might come too late for Ideal, but it might be just in time for a fresh crop of hardware startups. And R&D pushed by Yeric’s branch of the CHIPS office is intended to help chip startups in the next generation after that to move even faster. </p><p> But just as important, the CHIPS Act is scaling up the domestic manufacturing environment in ways that can also help startups. About $36 billion is in some stage of commitment to some <a href="https://spectrum.ieee.org/chips-act-funding#chips" target="_self">27 manufacturing and technology development projects</a> around the country as of late September. “If your design is limited by what a fab can do, then it limits, to some extent, some of your innovation capabilities.” says Celesta Capital’s Brathwaite. “The hope is that if you have U.S.-based foundry services you’ll get better support for U.S.-based startups.” <span class="ieee-end-mark"></span></p><p><em>This article appears in the November 2024 print issue as “Will the U.S. CHIPS Act Speed the <span style="background-color: initial;">Lab-to-Fab </span>Transition?.”</em></p><div class="post-pager js-listicle-pager" data-listicle-style="" data-async_load_parameters="settings=%7B%22use_pagination%22%3A+false%2C+%22pagination_order%22%3A+%5B%5D%2C+%22use_ads%22%3A+false%2C+%22ads_order%22%3A+%5B%5D%2C+%22use_numeration%22%3A+false%2C+%22numeration_sort%22%3A+-1%2C+%22items_as_posts%22%3A+false%2C+%22body_text_above%22%3A+false%2C+%22layout_type%22%3A+1%2C+%22show_columns_on_mobile%22%3A+false%2C+%22allow_url_update%22%3A+true%2C+%22is_guest_voting_allowed%22%3A+true%2C+%22cooldown_in_seconds%22%3A+null%2C+%22multiple_answers%22%3A+false%2C+%22up_down_voting%22%3A+false%2C+%22reorder_voting%22%3A+false%2C+%22no_redirect%22%3A+false%2C+%22no_post_section%22%3A+false%2C+%22enter_url%22%3A+false%2C+%22next_post_url%22%3A+null%2C+%22voting_extra_fields%22%3A+%7B%7D%2C+%22_deprecated_allow_url_change%22%3A+true%2C+%22_deprecated_turn_into_posts%22%3A+false%2C+%22source%22%3A+%22post_listicle_settings%22%2C+%22list_breaks%22%3A+null%2C+%22ads_breaks%22%3A+null%2C+%22prevent_last_break_repetition%22%3A+false%7D&display_ads=1&platform=desktop"></div><div class="around-the-web"><div class="from-your-site__headline">From Your Site Articles</div><ul class="around-the-web__list"><li class="from-your-site__item"><a href="https://spectrum.ieee.org/nstc" class="from-your-site__link" target="_blank" rel="noopener noreferrer">CHIPS Act: Centers Chosen for U.S. Chip Revival Plan - IEEE Spectrum ›</a></li></ul></div></div></div><span class="" data-elid="2669401997" data-post-url="https://spectrum.ieee.org/power-electronics" data-authors="Samuel K. Moore" data-headline="This Startup Shows Why the U.S. CHIPS Act Is Needed" data-page-title="CHIPS Act: This Startup Shows Why It’s Needed - IEEE Spectrum"></span><div class="tags"><a class="tags__item" href="https://spectrum.ieee.org/tag/chips-act">chips act</a><a class="tags__item" href="https://spectrum.ieee.org/tag/power-electronics">power electronics</a><a class="tags__item" href="https://spectrum.ieee.org/tag/mosfet">mosfet</a><a class="tags__item" href="https://spectrum.ieee.org/tag/startups">startups</a><a class="tags__item" href="https://spectrum.ieee.org/tag/devices">devices</a></div></div></div></div><script type="application/json" id="post-context-2669401997" class="post-context post-context-2669401997"> {"customDimensions": {"5":"Samuel K. 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Moore</a><div class="social-author__bio"><p><a href="https://twitter.com/SamuelKMoore">Samuel K. Moore</a> is the senior editor at <em>IEEE Spectrum</em> in charge of semiconductors coverage. An IEEE member, he has a bachelor's degree in biomedical engineering from Brown University and a master's degree in journalism from New York University.</p></div></div></div><div class="widget__head"></div></div></div><script type="application/json" id="post-context-2669401997" class="post-context post-context-2669401997"> {"customDimensions": {"5":"Samuel K. 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} rblbid.cmd.push(function() { rblbid.layout('universal'); rblbid.setTargeting("is_testing","no"); rblbid.setTargeting("is_home", "no"); rblbid.setTargeting("ieee_page_type", "postpage"); rblbid.setTargeting("ieee_post_id", window.postid); rblbid.setTargeting("ieee_category", window.category); rblbid.setTargeting("ieee_tags", window.tags ); rblbid.pubads().setPublisherProvidedId(window.ppid) rblbid.setTargeting("aud", "Interest432, Interest62, Interest35, Interest435, Interest63, Interest99, Interest124, Interest71, Interest70, Interest113, Interest443") }); function injectGooglePCDTag(segmentID, yourID) { const script = document.createElement('script'); script.async = true; script.id = 'google-pcd-tag'; script.src = `https://pagead2.googlesyndication.com/pagead/js/pcd.js`; script.setAttribute('data-audience-pixel', `dc_iu=/22278042776/DFPAudiencePixel;dc_seg=${segmentID};ppid=${yourID}`); document.head.appendChild(script); } fetch("/r/kappa/api/v2/reader/pixelids?aud=Interest432, Interest62, Interest35, Interest435, Interest63, Interest99, Interest124, Interest71, Interest70, Interest113, Interest443").then(result=>result.json()).then(res => { res.forEach(pixaud=>{ // (function() { // var a = String(Math.floor(Math.random() * 10000000000000000)); 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if(currentHeadline) { topbarHeadline.textContent = currentHeadline.textContent; } } }); }, {rootMargin: "0px 0px -" + windowHeight + "px 0px"}); createElementChangeListener(".infinite_scroll .widget", (el) => { headlineObserver.observe(el) }); createElementChangeListener(".article_column .widget", (el) => { headlineObserver.observe(el) }); createElementChangeListener(".feature_post_full .widget", (el) => { headlineObserver.observe(el) }); } }); window.REBELMOUSE_LOWEST_TASKS_QUEUE.push(function(){ }); window.REBELMOUSE_LOWEST_TASKS_QUEUE.push(function(){ function menuClick() { document.getElementsByClassName('huge-menu')[0].style.display = 'block'; document.getElementsByClassName('hambg-btn')[0].classList.add('js--active'); document.body.classList.add("huge-menu-opened"); document.body.classList.remove("menu-opened"); } function close(){ document.getElementsByClassName('huge-menu')[0].style.display = 'none'; document.getElementsByClassName('hambg-btn')[0].classList.remove('js--active'); document.body.classList.remove("huge-menu-opened"); document.body.classList.remove("menu-opened"); } function addMenuClickListener() { var rebelMenu_first = document.getElementsByClassName('rebelbar__menu-toggle')[0]; var rebelMenu_second = document.getElementsByClassName('rebelbar__menu-toggle')[1]; var menuClose = document.getElementsByClassName('hm__close')[0]; rebelMenu_first.addEventListener('click', menuClick); rebelMenu_second.addEventListener('click', menuClick); menuClose.addEventListener('click', close); } addMenuClickListener(); }); window.REBELMOUSE_LOWEST_TASKS_QUEUE.push(function(){ function createIdleScrollListener(callback) { let ticking = false; return function onScrollIdle() { if (ticking) { return; } ticking = true; requestAnimationFrame(function A() { callback(); ticking = false; }); }; } var stickyEl = document.querySelector('.topbar-sticky'); var startPosition = stickyEl.offsetTop; var darkTopbarHeight = document.querySelector('.topbar .dark_top_bar').offsetHeight; var currentPosition; stickyEl.style.height = stickyEl.offsetHeight + 'px'; document.addEventListener("scroll", createIdleScrollListener(function B() { currentPosition = stickyEl.getBoundingClientRect().top + darkTopbarHeight; if( currentPosition < startPosition ) { if( !stickyEl.classList.contains('active') ) { stickyEl.classList.add('active'); } } else { if( stickyEl.classList.contains('active') ) { stickyEl.classList.remove('active'); } } })); });</script></body></html>